PMC-Sierra (NASDAQ:PMCS) has taken the first major step towards evolving designs leveraging dual-polarization quadrature phase-shift keying (DP-QPSK) with coherent detection away from discrete electronic elements towards off-the-shelf system on a chip (SoC) devices. The company’s new PM6373 POLO 40G integrates SerDes, digital signal processing (DSP), analog-to-digital converter (ADC), OTN framing, and Forward Error Correction (FEC) functions for use in 40-Gbps designs. The obvious question, of course, is when PMC-Sierra plans to tackle 100 Gbps.
Jay Bennett, manager, marketing within PMC-Sierra’s Communications Products Division, says the POLO 40G will enable significant reductions in 40-Gbps line card density (2X) and power consumption (50%) versus non-coherent approaches, in part because the use of coherent detection obviates the need for bulky tunable dispersion compensation devices.
The SoC also offers an alternative to the few coherent-friendly ICs now available as multi-chip offerings from companies such as Cisco/CoreOptics. The POLO 40G SoC chip is designed to dissipate 16 W. Bennett estimates that a multi-chip approach would dissipate at least 3X more power and perhaps as much as 5X.
The POLO 40G leverages PMC-Sierra’s Swizzle FEC technology, which Bennett described as a hard-decision FEC with 18.8% overhead that provides +2 dB of improved performance.
Bennett says PMC-Sierra has targeted both line card and module applications for the device. The POLO 40G could be integrated within an OIF-compliant 5x7-inch module or placed behind CFP2 modules. He admitted he also has his eye on opportunities to replace CoreOptics chips. He sees a significant opportunity to support 40-Gbps transmission in packet-optical transport platforms, OTN systems, and Carrier Ethernet switch/routers or label switched routers with integrated DWDM shelves, such as Juniper Networks’ recently announced PTX Series Packet Transport Switch.
PMC-Sierra plans to have sample devices ready for selected customers in the third quarter of this year, with general availability shortly thereafter. A POLO 100G would appear the next likely step. Bennett would not comment on PMC-Sierra’s plans for 100-Gbps SoCs, other than to acknowledge such a device would make sense.
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