December 20, 2005 Sunnyvale, CA -- Applied Micro Circuits Corp. (AMCC ) announced its entrance into the Gigabit passive optical network (GPON) market with the introduction of its S3157PBI, a G.984-compliant transceiver featuring clock and data recovery (CDR) capability. Also, the company introduced its S3165PBI multi-rate (125 Mbit/sec to 2.67 Gbit/sec) OC-48 transceiver, which is based on the company's serializer/deserializer (SerDes) devices.
"Today, major OEM system vendors are working hard to prepare prototype systems and commence their first field trials," comments Daryn Lau, senior vice president and general manager for AMCC's Integrated Communications Products business unit. "With the ability to interface easily with FPGA solutions, AMCC's S3157 features a 16-bit wide data bus that provides customers with the option to use a lower cost and lower I/O speed FPGA, and the flexibility to easily meet their systems' design requirements."
The company, heretofore a supplier of PHY platforms in the Ethernet passive optical network (EPON) application space, says the S3157 is the first in a series of products aimed at the emerging GPON market. According to the company he S3157 is G.984-compliant and supports transceiver burst mode applications. Packaged in a 15 x 15 mm sq. 196-pin PBGA, the device features a small footprint and low power dissipation of 650 mW. The S3157 offers 16-bit parallel single-ended or differential LVDS I/Os with built-in termination resistors. The device interfaces with all standard FPGAs and ASICs.
Designed for WAN applications, the company says the S3165 is an addition to its family of multi-rate SerDes devices supporting 16-bit wide data interfaces. The company says the device provides system vendors with an integrated PHY platform that supports multi-rate functionality for optimum performance and design flexibility. The S3165's multi-rate functionality supports OC-48/24/12/3 with FEC, HDTV, D1, FC, 2FC, GE, DTV, ESCON data rates. Packaged in a 121-pin PBGA, the device offers a small footprint package and low power dissipation of 650 mW. The device features 16-bit parallel single-ended or differential LVDS I/Os and built-in termination resistors. The S3165 builds off AMCC's previously introduced S3065 transceiver, and interfaces with the company's Amazon, Rhine, and Danube framer products, as well as with FPGAs and customer ASIC solutions.
Both devices are currently sampling; evaluation boards are available. Volume production is scheduled for Q1 of 2006.