A move away from proprietary architectures will benefit both the users and providers of silicon.
Bidyut Parruck and Greg Wolfson
Azanda Network Devices
A "sea change" is happening within the communications silicon and network processor unit (NPU) markets. NPU architectures are moving away from proprietary models. Instead of evolving into more complex architectures, we are seeing a "de-evolution" of the NPU to more straightforward, standards-based processing cores using architectures such as PowerPC and MIPS.
While the benefits surrounding the NPU's programmable packet processing capabilities have been clearly borne out by multiple design wins and OEM interest, the enormous and ongoing investment required by proprietary NPU architectures has proven to be unsupportable within today's fragmented communications market. As a result, we will continue to see movement from silicon suppliers away from unique, vendor-specific communications silicon to that based on standard architectures and cores.
Proprietary NPU architectures require too many resources and provide too little return. Creating an NPU requires the development of proprietary processing cores, tools, development environments, and communication and system software development, not to mention the technical and marketing evangelism that accompanies these activities ¿ none of which is sustainable in today's fragmented communications market.
In addition, NPUs take significant performance hits when trying to handle specialized functions such as encryption. As a result, many OEMs have turned to off-chip merchant silicon to handle tasks that require the functionality and performance only hard-wired silicon brings to the table. Therefore, the need for a complex processing core is reduced and contributes to the desire for a simplified, standardized architecture.
The most visible example of this shift is IBM's decision to cancel development of its next-generation NPU in favor of a new programmable network processor based on the PowerPC architecture. Other examples will come to light as the industry continues along this path, but it is clear that the days of proprietary instruction sets for data-path communication processors are numbered.
So, what exactly will the NPU "devolve" into? Undoubtedly there will be varying forms from a variety of vendors. However, if they are to succeed, two key characteristics will be shared by all of these new devices.
The first is programmability. No other attribute of the NPU is more responsible for the interest and investment this technology has generated. As a result, this capability will be key to any successful next-generation device. However, with proprietary architectures, the industry has found itself in the midst of instruction set "wars," with each side marketing its own scheme as the superior solution. With the devolved NPU device based on standard processing cores, developers will have a set of common tools and programming environments that work across a wide variety of programmable devices.
The second characteristic will be more influential -- devolved NPUs will be able to take advantage of the enormous amount of code and applications that already exist for standard architectures such as PowerPC and MIPS. No matter how much has been invested in proprietary NPUs, that amount is dwarfed by what has and continues to be invested in architectures like PowerPC and MIPS. IBM's selection of PowerPC for its next-generation NPU device clearly reflects this trend, and other vendors will surely follow suit.
Good for all
For the systems OEM, standards-based technology will likely have a favorable impact on overall cost. A programmable, open-architecture NPU based on a standard processing core will be much easier to design around, as developers are able to spend fewer cycles creating software for a complex architecture. Thus, a migration path to next-generation devices can be planned more easily, reducing risk and time to market. Code developed on standards-based technology will be more portable, further reducing development cycles.
Finally, OEMs will be able to pick and choose the merchant silicon best suited to their system. Traffic managers, classifiers, security accelerators, ternary CAMs, and other application-specific silicon are already on the market and many are already being incorporated into designs using this approach. This allows OEMs to choose exactly the device that meets their needs, without being locked into a proprietary architecture that limits what they can use and thus the features they can add to their systems.
For the NPU developer, creation of programmable network silicon based on standards will result in a more sustainable model from which to create multiple generations of chips while reducing the enormous expense of a proprietary architecture. Silicon developers using standards-based architectures will be able to leverage pre-existing development environments, processing cores, and software, which will result in reduced development costs. Moreover, use of standards-based architectures will provide a clear migration path to future generations of devices. Standards-based processing cores will bring NPU vendors a much greater return on investment and stem the financial losses that are currently plaguing this market.
This new model will present an enormous opportunity for application-specific merchant silicon, as the proliferation of open architectures will greatly increase the addressable market for these devices from both a partner and customer perspective. OEMs will be able to select specific devices depending on their system design, while silicon suppliers will have a much larger ecosystem to build on.
It is time for a healthy and much needed "return to sanity" for the communications silicon industry. OEMs will retain the salient benefits of the NPU -- programmability and code reuse -- while larger NPU vendors will be able to return to a sustainable business model. The network processor was incredibly valuable as a vehicle for experimentation and progress, but both design and fiscal realities have brought their judgment upon proprietary implementations. Just as we moved from the ASIC + CPU to the proprietary NPU, the time has come to move to a more sustainable model. Devolved, standards-based network processing silicon based on an open architecture fulfills this need.
Bidyut Parruck is CTO and founder, and Greg Wolfson is executive vice president, marketing and business development, at Azanda Network Devices (Sunnyvale, CA).