Programmable chips help products evolve according to network needs

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Enterprise networks today are evolving from private, centralized data topologies to open architectures that provide information resources and services to distributed infrastructures. The growing trend away from centralized network services toward distributed services addresses the needs of today's business customers who want transparent, secure access to network resources irrespective of whether they are working at premises, campus, national, or international locations. Business clients not only communicate among themselves, they are increasingly transacting business with their vendors and suppliers via e-commerce. Networked connectivity has become a valuable enterprise resource for companies of all sizes.

The convergence of voice and data will consolidate the network infrastructure, causing the lines between local-area and wide-area networks to eventually disappear. A multiservice architecture can support all existing data applications as well as handle mission-critical, real-time voice and video in a single integrated system. Mixed-media traffic at the infrastructure level offers significant cost and management advantages. The use of Asynchronous Transfer Mode (ATM) for multiservice networks ensures both quality of service (QoS) and the low end-to-end latency necessary for real-time communications. These new networks must be scalable and optimize the use of bandwidth while maintaining low cost of ownership, including maintenance and network management.

Increased traffic volumes together with multimedia demands mean higher data throughput over already-strained access and backbone networks. New applications and services require significantly more bandwidth and network resources. Traffic topology is migrating to any-to-any and any-to-many connectivity. The implications of these trends are additional delays, congestion, and data loss in the network.

To meet these new communications needs and address many of the problems, public and private networks are transitioning from legacy circuit-switched to more efficient cell and packet-switched systems. Next-generation networks are expected to deliver fast, comprehensive broadband communications to a wide range of demanding enterprise customers. Programmable reduced instruction-set computing (RISC) processors in multiservice very large-scale integration (VLSI) semiconductor devices offer cost-effective, highly scalable solutions for both voice and data networking needs. Programmable software can give users the flexibility to reconfigure systems as network needs change.

Voice calls traditionally have been carried over circuit-switched networks utilizing time-division multiplexing (TDM). The TDM infrastructure, however, is becoming increasingly inefficient because the explosion in Internet access has generated a huge increase in signaling data traffic, overwhelming connection-oriented networks.

With the technology developments of the past few years, voice applications are beginning to attain acceptable performance on networks designed for data. Data historically has been transported in a variety of packet schemes, chiefly over 10/100-Mbit/sec Ethernet for local area networks (LANs).

Connectionless packet switching is 10 times more efficient than circuit switching. Packet networks typically mix voice and data traffic over a single circuit, compressing the voice for greater network efficiency. Packetized voice can significantly decrease the per-minute charge for handling voice traffic, a major cost factor for enterprise users. Eventually, the enterprise is expected to move to virtual-private-network (VPN) services over a connectionless backbone.

The demarcation between local-area and wide-area networks is starting to blur. In the next few years, wide area networks (WANs) will need to adopt transmission control protocol/Internet protocol (TCP/IP) for reliability, QoS, and network management. As the complexity of the network increases, management is more difficult. A single network for voice and data can improve the use of links and reduce ownership and management costs. The use of voice over IP, among other IP-based services, is on the rise. Data services are now migrating to WANs, which serve as dedicated enterprise networks.

Transitional networks must be able to handle voice, as well as data services such as frame relay, as a mix of TDM, packet, and cell traffic. As networks evolve from voice-centric to data-centric highways, the challenge for original equipment manufacturers (OEMs) is to offer network systems that provide flexibility, portability, and ease of use to customers. For example, it is important to preserve user network interfaces at the TCP/IP level for data customers. And as the demand for higher bandwidth calls for bigger transport pipes, processing power required for signaling, controlling, and managing the network will become the bottleneck.

Global, multiservice enterprise networks will require efficient bandwidth utilization, higher levels of performance, design simplicity, and, of course, cost-effectiveness. Advanced packet and cell technologies can deliver both improved price and performance to meet these needs.

Synchronous Optical Network/Synchronous Digital Hierarchy (sonet/ sdh) is today's technology of choice for providing high-capacity long-haul communications transport. sonet/sdh can cost-effectively transport a mix of services such as IP, TDM, and ATM in access and backbone networks at OC-3 (155-Mbit/sec) to OC-192 (10-Gbit/sec) speeds. It offers reliability equivalent to circuit switching and facilitates interoperation of multiple vendor systems. Other sonet/sdh advantages include flexibility, robustness, efficient grooming of channels, resiliency from network failures (self-healing), and synchronization.

Multiservice networks can take advantage of sonet/sdh features through better utilization of WAN bandwidth, support of QoS and differentiated services, and the implementation of multicasting. sonet/sdh can achieve efficient bandwidth utilization and economies of scale while maintaining reliability and high performance.

Successful system designs for multiservice networks require that equipment vendors develop solutions for both access and transport. In addition to addressing customers' needs, the product set must provide reliable, scalable, high-speed, low-latency connections across the network.

Ideally, access technology will deliver any service the customer wants at line rates ranging from DS-0 (64 kbits/sec) to OC-12 (622 Mbits/sec). A multiservice gateway should enable access to the broadband network and support IP, TDM, and ATM services.

Flexible access and high performance can be achieved with an ATM switching technology that processes both cell and packet traffic. ATM delivers high throughput in network backbones. It also provides service flexibility and effective switching for carriers. ATM can handle all data, voice, and video networking needs in one integrated network structure.

To transport multiple types of traffic, OEMs must design network equipment that can accommodate a range of speeds and changing system requirements. Networks must be able to handle speeds ranging from asynchronous DS-0 TDM to OC-48 (2.5 Gbits/sec) and higher for packet and cell payloads over optical networks. VLSI semiconductor devices, which contain programmable functions, offer a convenient way to manage multiservice traffic over sonet/sdh lines. Programmable software can give users the flexibility to reconfigure network systems as needs change. Th 06fea05 1

Fig. 1. Embedded RISC firmware can be used to configure and reconfigure network eqipment such as switches, routers, multiservice access multiplexers, and transmission systems in a multiservice wide-area network.

Programmable VLSI semiconductors can be used in multiple network elements supporting packet over sonet/sdh as well as other fiber-optic transport schemes on a multiservice WAN (see Fig. 1). A multiservice access multiplexer, for example, can incorporate multiple programmable elements-overhead terminators, switching devices, an octal (8-channel) framer, and a data-link controller (see Fig. 2).Th 06fea05 2

Fig. 2. In this diagram of a multiservice access multiplexer, the programmable very large-scale integration devices-overhead terminators, communications processors in the switching devices, 8-channel (octal) T1 framer, and high-level data link controller-improve design flexibility. The multiplexer aggregates time-division multiplexing, Internet-protocol packet, and Asynchronous Transfer Mode traffic from subscribers and swiches or routes it to the appropriate network servers.

Programmable overhead terminators handle lower-level processing at the Open Systems Interconnection (OSI) physical layer (Layer 1). These overhead terminators map and de-map ATM, packet, and TDM traffic over 155-Mbit/sec to 2.5-Gbit/sec sonet/sdh transport and perform complete section and path-level processing. These devices also address the issue of how to carry packet and cell payload to sonet/sdh pipes by performing both packet and cell delineation.

Programmable octal framers are suitable for ATM multiplexers, frame-relay nodes, sonet/sdh add/drop multiplexers, T1/E1 Internet access equipment, computer/telephony integration products, or digital crossconnect systems. A high-level data-link controller for packet transport can handle data rates of less than 64 kbits/sec and up, frame-relay control, and SS7 protocols. Multiple programmable devices can provide switching for voice-over-IP, ATM, and frame-relay services. These devices enable equipment vendors and carriers to develop pure TDM, packet, and cell networks-or hybrid systems.

Migrating more of the protocol management functions from higher-level software to embedded and distributed firmware in the devices will increase the effective network throughput for data payload. The more protocols a system uses, such as the seven layers of the OSI reference model, the more processing power is consumed by the system resources in managing these protocols, and hence the throughput is constrained. In VLSI devices, higher-level functional support can be handled by advanced software contained in their programmable RISC cores. Higher-level functions such as Layer 3 and 4 operations, signaling, maintenance, and network management can be performed by the RISC processor, freeing up the system's central processing unit to concentrate on data handling.

Programmable RISC cores offer network OEMs a high degree of design flexibility. As communications standards evolve, RISC firmware will help systems migrate to new standards, thus extending product life while maintaining compatibility with both old and new equipment in the network.

The use of packet over SONET/SDH is growing, but a key element is still missing: the ability to provide QoS. Packet services, although still best-effort transport, are becoming more reliable. However, guaranteed latency and data loss rates cannot be achieved in packet systems as yet.

Other issues include access integration, network reliability, and mediation (i.e., transporting, signaling, and network-management information). One technology that addresses these issues is ATM. And programmable VLSI devices support end-to-end ATM QoS control.

When data streams are multiplexed into SONET/SDH frames, or when voice, video, and data are combined in a multiservice environment, ATM offers flexibility, robustness, and the capability to offer QoS guarantees. Network-equipment vendors and service providers want to be able to offer QoS capabilities to their customers.

QoS opens the door to multilevel service offerings. Service providers can charge customers based on the different levels of access and service quality. QoS can also ensure reliability for critical information carried over the Internet. Thus, it is important for multiservice networks to handle ATM cells, along with other types of traffic.

ATM technology is also likely to be widely supported. According to a December 1998 report from Forrester Research, 80% of the service providers polled intend to build their multiservice networks based on ATM.

Embedded RISC processors offer another advantage: the ability to develop differentiated products and services. Programmable VLSI solutions allow systems developers to easily customize devices, to program application-specific firmware, and to create differentiated market offerings. As with QoS, a range of features and service levels would command different prices. A complete package of reference designs and development tools will allow the developer to customize design software to exact system specifications. System flexibility and upgradability is maintained while greatly reducing network equipment time-to-market.

But systems developers should bear in mind two key factors: Programmable VLSI devices should be designed for the class of application and programmable solutions must use the right mix of hardware and software elements. The VLSI device supplier should offer expertise in determining appropriate hardware/software tradeoffs and have the ability to create versatile, easy-to-use programmable devices.

Multiprotocol, multiservice architecture will enable next-generation networks to deliver differentiated products and services to targeted classes of customers on one global communications platform. These flexible networks will allow service providers to address new market opportunities such as unified messaging and videoconferencing.

To achieve the full potential of multiservice networks, communications OEMs need programmable VLSI solutions that offer flexibility, performance, and ease of migration from legacy systems to future-safe, high-speed sonet/sdh platforms. Device suppliers must be prepared to deliver highly integrated, single-chip solutions for these applications. q

Dan Upp is vice president of technology development and Jitender (Jati) Vij is vice president of systems engineering at TranSwitch Corp. (Shelton, CT).

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