New 10G backplane strategies offer promise

May 1, 2005

Today, most cards are connected within a rack via a backplane, but the drive toward 10 Gbits/sec has limited the distance such connections can run. While cards that require high-speed connection can be cabled together using fiber or a short span of coax, both the Optical Internetworking Forum (OIF) and the IEEE are examining alternative means to extend the distance two cards can be connected electrically on a 10-Gbit/sec backplane.

The problem stems from an increase in input/output capacity; today’s systems feature more cards per system and greater capacity per card. Reductions in size and power consumption and increases in the signaling speed of fiber-optic transceivers like the XFP, XPAK, and X2 are driving up the capacity per card. But advances in backplane architectures have not kept pace. Vendors are shipping products based on the XAUI and InfiniBand speeds of 3.125 and 2.5 Gbits/sec, respectively.

“Several years ago, the entire industry realized it was time to move to the next speed,” recalls Steve Joiner, vice president of marketing for the OIF (Fremont, CA). The industry is looking to increase XAUI speeds from 3.125 to 6.25 and eventually 12.5 Gbits/sec per channel. For InfiniBand, the next target speed is 5 Gbits/sec and then 10 Gbits/sec.

To achieve these increases, the OIF has established a Physical and Link Layer Working Group to define electrical specifications, known as a common electrical interface (CEI), for 4.976- to 6-plus Gbits/sec and 9.95- to 11-plus- Gbit/sec serial signaling for chip-to-chip and board-to-board applications. Each rate is further defined to support two distances: short reach up to 200 mm or 8 inches of PC-board trace with up to one connector and long reach up to 1 m or 39 inches of PC-board trace with up to two connectors.

That has proven to be easier said than done, however, thanks to signal impairment issues. “In the optical domain, you think of it as chromatic dispersion and PMD [polarization-mode dispersion],” explains John Monson, vice president of marketing at Scintera Networks (San Jose, CA). “In the backplane, it’s loss, attenuation, and crosstalk. It’s the same principal as optical, only in a different medium. You still need to recover a signal that doesn’t look very good. And the further it goes, the worse it looks.”

Even at speeds lower than 10 Gbits/sec, some form of equalization may be necessary to clean up the signal. “The first thing that everyone does is compensate the drive and the receive circuit, because some of this [impairment] is just attenuation versus frequency,” says Joiner. “If you could compensate for that by increasing the gain at higher frequencies, then you can compensate for some of these impairments. But as you increase the speed, there comes a time when even this doesn’t work anymore-this simplistic view of just equalization.”

So how then will the industry solve this 10-Gbit/sec backplane conundrum? According to Gary Humbert, new-product development manager of backplane products at Molex (Lisle, IL), the industry is divided into two schools of thought. “Everyone is the sum of their experiences, design-wise,” Humbert says. “And each approach is very logical.”
Molex’s new GbX FR408 reference backplane supports 10-Gbit/sec speeds up to 1 m using Xilinx’s Virtex-II Pro X FPGA. The device is significant, say company representatives, because it demonstrates the performance of connectors, chips, and board materials at different lengths.

The first school of thought believes that developing new backplane technologies capable of supporting 10-Gbit/sec transmission speeds is the best approach, but that is no trivial task. Backplane vendors like Tyco, Teradyne, and Molex are pouring a great deal of money into the research and development of backplanes that provide better isolation to reduce crosstalk. There are literally dozens of materials that have been compounded by the resin manufacturers and evaluated by the PCB and backplane manufacturers; to date, no single material has been identified as the best to support 10-Gbit/sec backplanes.

Despite this lack of consensus, Humbert remains bullish on the benefits of new backplane materials. “Basically, we are quadrupling the speed of the system and therefore quadrupling the overall bandwidth of the system,” he says. “We’re enabling the customer to affordably take all those pipes of bandwidth out of these wonderfully dense optical transceivers and be able to more affordably distribute all of the bandwidth popping out of that glass fiber.”

Not everyone is sold on this approach, however, since “it assumes that you’re going to pull everything out and start over,” muses Scintera’s Monson. “If you’re not, then it gets to be a much tougher problem.”

What if you want to leverage your existing equipment; is it possible to attain higher speeds using legacy systems? “That’s where you really have to compensate for a lot of inadequacies in the backplane,” says Monson. “They really weren’t built to go 6 gig and they weren’t built to go 10. They were built to run 2-gig lengths or 3.125-gig lengths.”

“The desire is to be able to do line-card upgrades so you don’t have to do a forklift change of all the cards in your box,” adds Joiner. “Everyone is designing around a pay-as-you-grow strategy. The reason that people are willing to spend money to take a legacy-designed backplane and increase its bandwidth is this idea that they don’t have to replace everything all at once. They are therefore willing to spend a little bit more money on the electronics versus replacing all the hardware all at once.”
Thanks to reductions in size and power consumption, chips like the Virtex-II Pro FPGA from Xilinx can now be added to the backplane of an equipment box.

By all accounts, a small army of semiconductor vendors seems to be working on this problem, from the FPGA and ASSP developers like AMCC, Xilinx, and Vitesse Semiconductor to the IC vendors who provide electronic dispersion compensation devices for the optical world, like Scintera and Mysticom. Each of the chip vendors is developing its own technique for solving the rate and distance challenge; some are focusing on the transmit side, while others are targeting the receive side.

According to Humbert, the evolution of 6- and 12-Gbit/sec chips has accelerated over the last 18 months. “A dozen or more chip suppliers can now produce robustly performing 6-gig chips. A handful-maybe 10 or less-can produce a 10- or 12-gig chip,” he reports. “Meanwhile, there are dozens of chip manufacturers right now that can do InfiniBand 2.5-gig or 3.125-Gbit XAUI-level chips, but the industry leaders are the ones that are tackling 6 and 12 [Gbits/sec].”

While a few vendors have 6- and 12-Gbit/sec ICs available today, Humbert believes the real market will emerge in three to four years. At that point, these new ICs will be as readily available and affordable as today’s chips. “My own take is that over time, there’s going to be new technologies in the backplane and the SerDes functions from a variety of vendors that will increase the rate and allow you to go 10 Gbits-plus on the backplane,” agrees Monson. “There’s no doubt in my mind that’s going to happen. There’s an entire market there.”

Until then, standards bodies like the OIF and the IEEE 802.3an Working Group will continue to examine the problem, both from the perspective of leveraging legacy equipment to ripping it out and starting with all-new equipment. While the problem is complex, the process of solving it has drawn disparate industry segments together. “We are no longer sitting on an island just thinking about connectors,” says Molex’s Humbert. “The key thing for all of us in the industry is to show OEMs that this technology is viable, affordable, and available. Those are the three key things, and they’re important to the chip manufacturers, the component manufacturers, and the PC-board material vendors. You need that triangle of components to make these channels work.”

Meghan Fuller is the senior news editor at Lightwave.

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