Fujitsu claims advance in coherent DSP algorithms

Fujitsu Ltd. has detailed research that could make digital signal processing (DSP) chips for coherent detection significantly smaller, lower cost, and less power hungry. The new chip design can compensate not only for linear distortions of the optical signal like chromatic dispersion, but also for complex waveform distortion caused by nonlinear effects – something that the current generation of DSP chips does not do.

Fujitsu Ltd. has detailed research that could make digital signal processing (DSP) chips for coherent detection significantly smaller, lower cost, and less power hungry. The new chip design can compensate not only for linear distortions of the optical signal like chromatic dispersion, but also for complex waveform distortion caused by nonlinear effects – something that the current generation of DSP chips does not do.

Coherent detection, paired with dual-polarization quadrature phase-shift keying (DP-QPSK) modulation, is the optical industry’s preferred approach to 100-Gbps long-haul transmission and beyond. Fujitsu says it is also exploring this technology for high-capacity, short-range applications such as data centers and access networks.

Using conventional methods, the implementation of nonlinear compensation technology would require massive circuits with more than 100 million logic gates, and chips of this size are only expected to become feasible around 2020, according to Fujitsu. Reducing the scale required of such circuits, therefore, has been a pressing issue.

In September of last year, Fujitsu Ltd., Fujitsu Laboratories, and Fujitsu Research and Development Center revealed that they had developed a technology that would dramatically simplify and reduce the size of these circuits by 70%, making them commercially viable as early as 2015 (see "Fujitsu details DSP algorithm and circuitry for transmission beyond 100 Gbps"). Now the researchers have improved their design further with a new signal-processing algorithm that, while retaining the distortion-correction performance of the technology developed last year, slashes the number of circuit stages required to about one-seventh of current typical levels – and about half the level of Fujitsu's previous technology.

In a transmission test at 112 Gbps over 1,500 km, Fujitsu showed that a three-stage circuit based on the new technology achieved the same signal quality as 20-stage circuit using conventional technology. The work was reported at ECOC 2011 in Geneva. Some of the research was conducted as part of the "Universal Link Project R&D" sponsored by the National Institute of Information and Communications Technology (NICT) in Japan.

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