Menara Networks announces new class of EDC technology

MARCH 27, 2009 -- The components developer says its EDC was shown to effectively compensate for dispersion impairments on a 400-km link of uncompensated SMF-28 fiber.

MARCH 27, 2009 -- Menara Networks (search Lightwave for Menara), an optical networking components supplier, has announced a new class of clock and data recovery receivers that perform discrete-time analog signal processing at 12 Gbps. The company says this new class of EDC was shown to effectively compensate for dispersion impairments on a 400-km link of uncompensated SMF-28 fiber.

The announcement demonstrates a new class of silicon receivers, based on the company's 12-Gbps "MagicEye" platform. It utilizes the principles of partial-response maximum likelihood equalization (PRML) and a discrete-time analog design that does not require an analog-to-digital converter (ADC) common to existing technologies. Using this receiver, Menara Networks experimentally demonstrated a total compensation for over 6,500 psec/nm of fiber chromatic dispersion at 12-Gbps NRZ operation. Its achievable reach (over 400 km of uncompensated standard mode fiber) offers a potential technology for seamless 10G upgrade of existing 2.5G deployed optical long-haul networks.

"PRML has been used with great success to mitigate ISI impairments in high-density magnetic and optical storage systems. Its use to compensate for fiber dispersion is an industry's first," says Salam ElAhmadi, Menara's founder, chief technology officer, and vice president of sdvanced technology. "It is a multi-approach solution that augments existing maximum likelihood sequence estimation (MLSE) approaches with effective signal equalization. Eliminating the multi-gigasamples/sec ADC which severely reduces the quality of the received signal and limits the effectiveness of MLSE processing was key in achieving performance enhancement over other solutions. Menara's MagicEye platform is the first commercial analog signal-processing engine capable of multi-gigabits per second operations and can effectively address a number of applications outside optical communications."

"This announcement is a culmination of a number of industry firsts in the area of high-speed precision analog circuit design," adds Matthias Bussmann, Menara's vice president of IC design and engineering. "Menara's ultralong-reach EDC solution is the first successful silicon implementation of an analog Viterbi processing engine, programmable equalizer, and an algorithmic-driven clock recovery circuits operating at 12 Gbps, all monolithically integrated into a single silicon die capable of operations within the size constraints of pluggable optical transceivers."

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