SEPTEMBER 21, 2010 -- Altera Corp. (NASDAQ: ALTR) says it has become the first company to successfully demonstrate 25-Gbps transceiver performance in programmable logic. Altera used its 28-nm transceiver test chip, a prototyping platform for deployment of 28-Gbps transceivers on 28-nm FPGAs.
Altera's 28-nm transceiver test chip is designed to provide insight into how high-performance transceiver designs will behave on TSMC's 28-nm high-performance (HP) process. Altera will use the results to develop and apply optimization techniques for power, jitter, and link performance in the production tape-out of Stratix V FPGAs featuring 28-Gbps transceivers.
"Altera’s achievements with transceiver technology at 28-nm sets the bar high for the rest of the chip industry who are rapidly trying to support the next-generation of 4x25-Gbps high-density, low-power optical modules," said Christian Urricariet, director of marketing for high-speed optics at Finisar. "Together, Altera and Finisar are leading the way to bringing high-bandwidth, low-cost optical communications to the market which will inevitably change the way datacenters are designed and architected."
"The industry's move to 28-Gbps transceivers enables next-generation broadband networks to address the demand for increasing bandwidth while maintaining form factor, cost and power constraints," said Luanne Schirrmeister, senior director of product marketing at Altera. "The results we demonstrated on our 28-nm transceiver test chip clearly show Altera is on the forefront of this evolution and we are on target to achieve 28-Gbps on our 28-nm FPGAs. Our ability to provide these high-performance, low-power transceivers is a direct result of the close collaboration between Altera and TSMC and the use of TSMC's 28-nm HP process, which offers an ideal choice for devices used in next-generation, high-bandwidth systems."
A demonstration video showing Altera's 28-nm transceiver test chip running a pseudo-random bit pattern at 25 Gbps is currently available on Altera's website.