FEBRUARY 11, 2010 -- The Optical Internetworking Forum (OIF) is starting a new 100G project titled “VSR 28G Common Electrical Chip-to-Module Interface” that it expects will support the use of less complex, lower power 100G optical modules. Feedback from attendees at the OIF’s Common Electrical Interface (CEI) workshop, held February 1, was that a very short reach chip-to-module electrical interface is needed to enable 100G optical modules that do not implement full retiming in the module.
The OIF says the new project will result in an implementation agreement that will define data lane(s) that support bit rates up to 28 Gbps for chip-to-module interfaces with distances from zero to a minimum of 100 mm on a host PCB. The project will also define the channel model based on a chip-to-module application as well as define a test methodology for a chip-to-module interface including a single connector.
“This implementation agreement will allow lower power, smaller form factor multi-source 100G optical modules to be developed that will increase face-plate port density,” said David Stauffer of IBM and the OIF’s newly re-elected Physical and Link Layer Working Group chair. “This will further the integration, power reduction, and cost reduction of 100-Gbps line cards.”
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