Chip vendors line up for EDC business
The development of new application codes for singlemode transmission has legitimized new metro applications for electronic dispersion compensation (EDC). However, the focus of most EDC vendors appears to be on the emerging multimode fiber market that the pending 10GBase-LRM PMD will define. IC suppliers used last month’s OFC/NFOEC to position themselves to compete for design slots in a variety of form factors-including ones such as the SFP+ that don’t exist yet. But while the chip vendors exude confidence in their abilities to meet the performance specifications called out in the PMD, the power dissipation limitations of the various module form factors, and the cost targets of their customers, not every module vendor shares their optimism.
According to David Cunningham, chair of the IEEE P802.3aq Task Force that is developing the LRM specifications, the IEEE meeting last month in Denver, CO, saw what he termed a “minor” technical tweak to the draft. He expects to go through two more review rounds-one in May and the other via phone call in June-before asking for publication approval at the plenary meeting in July. If all goes well, the document containing the specification should receive publication approval in September.
With this timeframe in mind-and with pressure from module vendors who want to have products ready when the LRM is approved, if not before-IC suppliers have staked out their territories, including a few new entrants.
Scintera Networks (San Jose, CA) tops the list, having beaten its competition to market with the SCN3142 Electronic Dispersion Compensation Engine. With the exception of companies using in-house technology, most if not all of the 10GBase-LRM module demonstrations at industry tradeshows over the past two years have leveraged the SCN3142, and it is the merchant IC device with which module vendors are most familiar.
Unlike its competition, Scintera has focused its device on EDC, rather than combining dispersion compensation with other major transceiver functions. Nevertheless, Abhijit Shanbhag, Scintera’s cofounder and chief technology officer, is confident that the device will find application in both the larger XAUI-based modules such as XENPAK and X2 as well as smaller, more power-challenged form factors such as XFP.
He also thinks modules that use Scintera technology will match competing 10GBase-LX4 designs when it comes to link lengths. Describing the fiber models used within the 802.3aq task force as “very conservative,” Shanbhag says the company’s research indicates its device will support 300-m distances “with a very high coverage percentile of well over 90 percentile, probably about 95 percentile.”
The focus on a pure-play EDC device probably helped Scintera be first to market. However, the company will not dig in its heels in the face of customer requests. “If you look at the market as a whole, there is a movement toward smaller, lower power, and more integration,” admits John Monson, Scintera’s vice president of marketing. “But there’s a reason why we put [our chip] in CMOS. So we intend to integrate and we’re moving forward with that.”
Shanbhag says the first integrated device will combine EDC with clock and data recovery (CDR). Neither he nor Monson would comment on when such a device would be available.
Meanwhile, the other IC vendors in this space have aimed at an integrated offering from the start. The integration path has two forks: EDC with CDR, with an eye primarily toward XFP, and EDC with PHY/SerDes functions aimed initially at XAUI-based transceivers and, perhaps down the road, SFP+.
Phyworks Ltd. (Bristol, UK) raised its hand first in the EDC/CDR class. The company demonstrated its PHY1060 EDC IC in Anaheim last month, working in tandem with its PHY1090 transimpedance amplifier (TIA). Both devices are available for evaluation, and Nick Weiner, Phyworks CTO and editor of P802.3aq, says the company is working with “lead customers.” While the device is targeted at XFP, it can be used in XAUI modules with a bridge chip. Weiner says he believes the XAUI modules will be the first LRM modules to market.
The company’s stated goal is to support LRM price targets of less than $200 per module. With that in mind, it is offering the PHY1060 and PHY1090 at $55 for the pair, in volume.
The UK firm recently gained a direct competitor for EDC/CDR design slots when Vitesse Semiconductor (Camarillo, CA) purchased EDC IP from Infinera, which had bought the technology from Big Bear Networks late last year. (Vitesse acquired IP for multimode fiber applications only; Infinera kept the singlemode EDC IP for itself.) Vitesse announced an LRM chipset at OFC/NFOEC. The offering includes a photodiode, laser driver, linear TIA, XAUI transceiver, and the VSC8238 EDC with limiting amplifier and CDR.
Lee Walter, product marketing manager, network products at Vitesse, says that the chip provides 4 to 6 dB of margin at 220 km; at 300 m, it offers 2 dB with 99% fiber coverage. However, the device is based on silicon germanium (SiGe), which is more power hungry than the CMOS devices most other competitors offer. A CMOS version of the device is on the roadmap; the company hopes to reduce the power dissipation to the neighborhood of 300 mW. The company is also looking at an EDC/SerDes pairing next year in CMOS.
However, it is likely that other offerings that combine EDC with PHY/SerDes functions will already be in the market. For example, Aeluros Inc. (Mountain View, CA) announced its CMOS-based Puma AEL1003 PHY/SerDes device with integrated EDC on March 1. Aeluros received first silicon just in time to demonstrate the device at OFC/NFOEC, reveals Aeluros vice president of marketing Shantanu Mitra. While the company plans to do electrical testing in its labs, it will make the silicon available to module partners to complete evaluation. Anticipating a re-spin, Mitra says the company should have a fully qualified part by late third quarter or early fourth quarter of this year.
Mitra says the EDC-enabled PHY will dissipate around 1.5 W or less, a figure he believes the company can reduce. He expects the device to be particularly popular among X2 vendors, where the company is already enjoying success in modules aimed at other PMDs.
Aeluros likely will battle Quake Technologies (Kanata, ON, Canada) for many of these design slots. Quake also specializes in 10-Gigabit Ethernet PHYs and has already dabbled in EDC with the QT1006. However, Mitch Kahn, Quake’s vice president of marketing, says the company has decided to pull away from that device in favor of a new integrated EDC/PHY chip. While the company is known for its work in SiGe, Kahn expects to have a CMOS-based IC by the second quarter of this year. He declined to provide additional details.
These entrenched IC providers will see competition from ClariPhy Communications Inc. (Irvine, CA). Unlike most EDC offerings for the LRM space that use some form of decision feedback equalizer (DFE) and/or feedforward equalizer (FFE), ClariPhy will pair FFE with maximum likelihood sequence estimation (MLSE). MLSE has been used successfully by companies such as CoreOptics for singlemode applications, but ClariPhy CEO Paul Voois says his crew has found a way to apply it economically to multimode requirements. The CMOS-based device should begin sampling by the end of this year’s third quarter, Voois says.
While these companies made sure their presence in the market was noted, two developers of singlemode EDC who once looked ready to enter the multimode space appear to be hanging back. Both Broadcom (Irvine, CA) and AMCC (San Diego, CA) displayed their singlemode offerings at the show. However, Broadcom’s Bob Salem, product line manager, networking physical layer-optical, says the company will wait for the LRM PMD to be ratified before it makes a move. Meanwhile, Oswin Schreiber, senior product marketing scientist at AMCC, says his company has worked on a device for multimode applications that is not yet ready for market.
Both Intel Corp. (Santa Clara, CA) and Analog Devices (Wilmington, MA) bear watching. Intel has previously displayed an IC that combines EDC with CDR; a company source says the device will be ready for production in late 2007. Also, sources at Analog Devices hinted that while the company has no interest in offering EDC devices, there are other ways to tackle the dispersion problem that they might pursue. The sources declined to provide details.
While the IC suppliers polish their offerings, module vendors watch with interest. Some transceiver manufacturers, particularly Avago Technologies, Finisar (which bought Big Bear’s 10-Gbit/sec module line and would thus be a likely candidate for Vitesse’s offering), and Intel promise to be particularly aggressive. However, several prominent module suppliers appear somewhat chilly to EDC and the LRM in general. Some, such as EMCORE and Opnext, have focused on the competing LX4 PMD (although Opnext sources say that LRM devices are on their roadmap). Others, such as JDSU, aren’t sure that the technology necessary to support customer requirements will be ready soon. John Stewart, director of marketing for component and module products at JDSU, says it is his belief that it will take a second generation of EDC devices to meet JDSU’s requirements, particularly in terms of price. Most module vendors say that the LRM modules will need to be 20% to 25% cheaper than LX4 devices to overcome the latter’s head start in the market and longer specified reach.
ExceLight Communications Inc., a Sumitomo company (Durham, NC), demonstrated an LRM module at OFC/NFOEC. According to Eddie Tsumura, the company’s vice president of engineering and marketing, ExceLight plans to offer LRM modules in the X2 and XFP formats, with product designs ready by the end of the year. While the company used a Scintera chip for the demonstration, Tsumura says that ExceLight’s engineers have not committed to a supplier-a decision that needs to be reached by early this summer, he says.
Tsumura says that the three key technologies for a successful LRM module are the laser diode, the linear PIN TIA (LRM modules will require a linear TIA to ensure proper performance of the EDC device) and the EDC. He says that the laser and receiver areas appear well supplied, but that the EDC situation is uncertain. This is particularly true for XFP applications.
“Our understanding of XFP performance is it does not fully meet the IEEE standard from the viewpoint of coverage,” he says. “EDC performance is a tradeoff against power dissipation. So if the EDC supplier wants to achieve good performance, they need more power dissipation. But at the same time, XFP has a power dissipation limitation. That limitation limits the coverage.” Since the X2 has a looser power budget, the situation isn’t as challenging as that of the XFP; thus, finding an EDC device that meets the larger module’s power requirements shouldn’t be as difficult.
Like many module vendors, Tsumura says that ExceLight would prefer to use devices that integrate EDC with other functions, under the assumption that one chip will use less power and board space than two. If integrated devices aren’t available or don’t deliver the performance his engineers require, Tsumura speculates that the company would proceed with the X2 but delay its XFP offering.
Like companies such as ExceLight, the market appears to be on hold somewhat, with the PMD not quite ready for ratification, the EDC technology perhaps not quite ready for implementation, and the module vendors not quite ready to offer finished products. Certainly the EDC component will serve as the major catalyst for the market. Right now, all module vendors and potential LRM module users in the field can do is wait.