Meeting the demands of the new optical module market

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Intelligent PMD components will reduce costs and space requirements, which opens the door to more efficient GBIC-based modules.

Following the standard Open System Interconnection model, all modern fiber-optic systems comprise several layers of hierarchy, with the physical-media-dependent (PMD) layer forming the base. Because the PMD layer in an optical system must provide the bidirectional conversion between light pulses and electrical signals, it is inherently more complex than PMD layers in traditional copper-based networking systems.

For much of its early development, fiber technology could afford to invest additional cost into the PMD function because the use of fiber was typically reserved for ultra-high-speed backbone links providing lots of bandwidth between relatively few devices. However, optical PMD designs are coming under increasing cost pressures as the deployment of optical networking is rapidly expanding beyond high-speed backbones into the workgroup local area network (LAN) and even fiber-to-the-desk in some implementations.

With copper-based Ethernet now giving way to higher-speed fiber-based versions, the floodgates are opening for widespread dependence on optical networking that will have to deliver the same degree of simplicity, robustness, and cost-effectiveness that users have already come to expect from their Ethernet installations. This expectation means that modern optical PMD modules will need to step up to new levels of functionality, integration, volume production, and cost reduction. We'll explore in more depth the market forces that are driving the need for these new PMD devices as well as some of the specific design changes occurring at both the component and module levels.

A number of market and technology forces are driving the overall demand for higher volumes of optical interface modules. Of course, the primary force is the ever-increasing need for greater network performance spurred by data-intensive applications as well as by the sheer growth in the number of users. Additionally, these factors have been combined with organizational requirements for higher productivity and on-demand communications responsiveness.

From a networking standpoint, the underlying physics of copper-based interconnects such as inherent high capacitance, noise susceptibility, electromagnetic-interference (EMI) generation, and relatively poor signal-loss/distance ratios are becoming increasingly problematic as data rates escalate. In the long run, it is generally acknowledged that copper simply will not be able to support the widespread deployment of bandwidth-hungry applications like data warehousing, videoconferencing, real-time Internet traffic, and packetized voice.

Under these escalating network-performance demands, many organizations have already determined that fiber is becoming a less-expensive alternative than copper for delivering higher data rates. Not only does it require more power and complex electronics to drive existing copper wiring to higher speeds, but also copper weighs more than fiber and is more susceptible to EMI issues. In addition, because the Gigabit Ethernet standard requires upgrading most existing copper links to new Category 5 cabling, it makes sense for many companies simply to skip directly to fiber optics. This logic is especially true when companies consider that the copper cabling industry openly acknowledges that pushing speeds beyond Category 6 levels will require abandoning the existing RJ-45 connector form factor as well as going to more-expensive shielded cabling.

Along with the accelerating shift from copper to fiber, the need for more cost-effective PMD devices is also being driven by increases in the channel-carrying capacity of fiber links. As dense wavelength-division multiplexing (DWDM) has made it possible to carry many different channels effectively across a single backbone fiber by switching individual wavelengths, the overall economics of fiber deployment have changed dramatically.

With DWDM becoming relatively common on wide-area-network links and also now migrating into metropolitan-area networks, the door has been opened for effectively deploying Gigabit Ethernet directly across backbone links and all the way down to individual LANs and desktops. Obviously, such scenarios greatly increase the overall number of switching devices and nodes in the network topology that must be readily capable of handling direct fiber connections.

Unfortunately, the historic trends in optical PMD devices run counter to the need for higher volumes and lower costs. Traditionally, optical interface modules have been expensive, costing $100 or more, and have also been relatively large and power hungry. These drawbacks mainly have been due to the optical functions not being easily integrated within the rest of the PMD module design. Overall component counts were too high because the single-function optical devices had to be surrounded with lots of passive components, trimming pots, etc. In addition, designers of optical modules had to face the unfamiliar challenges of dealing with tricky laser-alignment and light-launching issues to optimize performance. As a result, until recently, the manufacture of optical modules has remained too much of a "handcrafting" operation to allow for optimization of either cost reduction or volume production.

High-volume optical modules for short-haul 850-nm fiber links typically use lower-cost and lower-power vertical-cavity surface-emitting lasers (VCSELs). Unlike edge-emitting lasers, VCSELs can be inexpensively manufactured in high volume. However, they must be precisely driven by the PMD devices for optimal power output to achieve the required digital signal waveforms. In the past, module manufacturers had to grapple with how best to tune and trim the output of lasers without sacrificing the VCSELs' inherent cost and power advantages to the excesses of an overly complex system design.

The newest generation of optical PMD components is now shifting many of these design challenges into silicon by using higher levels of integration to turn the physical-media interface into more of a "black-box" function that can be efficiently designed-in rather than handcrafted. For instance, by using submicron CMOS to incorporate a three-wire serial digital interface and integrated DACs, a new PMD component called the S7011 can be mated with a small external microcontroller with nonvolatile EEPROM memory. This combination effectively brings the entire external laser trimming function directly into the device. In this scenario, the various DAC setting values are determined at the time of manufacture, stored in the microcontroller's nonvolatile memory and reloaded into the VCSEL driver on subsequent applications of power.

Instead of requiring skilled technicians on the production line to tweak the laser trimming to optimize performance of the VCSEL, the entire configuration process can be automated using the PMD component's built-in intelligence.

In addition to integrating the trimming functions for lower board cost and streamlined manufacturing processes, such intelligent PMD devices are capable of automatically monitoring and compensating for output power variations during field operation. Typically, these capabilities can be performed in either an open-loop or closed-loop mode. Traditional closed-loop control actually incorporates a photodiode into the VCSEL housing to monitor the power level, which is then fed back into the PMD device where analog circuitry on the component makes adjustments to the laser driver output current as required to maintain a constant average optical output power.Th Acf11d

Figure 1. By using an open-loop configuration, designers can take advantage of new PMD component intelligence to eliminate the external photodiode.

On the other hand, open-loop compensation can further reduce the overall component cost by eliminating the external photodiode (see Fig. 1). Here, the designer can use the PMD component's built-in capability to sense ambient temperature for feedback purposes. The device then correspondingly adjusts the output modulation current to compensate for slope efficiency losses associated with increased temperatures.

Local on-chip control allows the optical waveform to be shaped automatically to optimize VCSEL performance. For instance, the PMD component can shape the output drive waveform to eliminate optical tailing in VCSELs. Optical output tailing is the unwanted charge-storage phenomenon that occurs when a VCSEL is shut off. In some VCSELs, optical tailing can last for several nanoseconds, which tends to close down the desired eye-diagram needed in high-performance gigabit-level operations. By pulling out the residual charge in the VCSEL, a new-generation laser driver can significantly enhance the overall performance and reliability of the optical module.

Integrating intelligence into the laser driver also allows for incorporation of automatic eye-safety management circuitry that can immediately shut down the laser output if the current level exceeds acceptable parameters. Module-level integration is also enhanced through provisions for driving the PMD device data inputs from either PECL or LVDS logic levels. The three-wire CMOS interface allows complete external control of the laser bias, modulation currents, and modulation-current temperature coefficient as well as setting up the eye-safety current threshold and configuring the device operating modes.

The marriage with a microcontroller and nonvolatile memory also support straightforward implementation of other higher-level functions such as waking up the microcontroller in response to error conditions and other interrupts and storage of manufacturer identification information. In addition, local intelligence and programmability enhance the ability to rework and/or reconfigure devices after the initial build, thereby eliminating scrap costs and improving manufacturing flexibility.

To further reduce parts count and the overall cost of optical interface modules, additional chip-level integration in CMOS can incorporate post-amplifier circuitry with the VCSEL driver described above to combine both transmit and receive functions in the same device. As an example, the S7013 integrated VCSEL driver and limiting post amplifier can amplify signals as small as 8mVp-p to drive devices with PECL inputs. Fabricated in 3.3V 0.35-micron CMOS, these devices can operate at very low power while delivering performance comparable to stand-alone monolithic designs. The elimination of any on-chip coupling between transmit and receive circuitry removes the risk of internal crosstalk. Combined with proper printed-circuit-board-level design, this architecture can greatly improve overall operation of simultaneous send/receive data streams. Digitally programmable loss of signal detection, loss of signal detection attack and decay times, and built-in hysteresis functions in the post-amp circuit ensure reliable performance and chatter-free operation for speeds up through 1.25 Gbits/sec. Th Acf5d

Figure 2. The use of send/receive PMD components greatly reduces the complexity of optical interfaces.

By accommodating interfaces to a wide range of transimpedance amplifiers (TIAs), an integrated send/receive PMD device can give manufacturers the flexibility to significantly reduce their overall printed-circuit-board (PCB) real estate requirements and component costs. As shown in Figure 2, the use of integrated send/receive PMDs can reduce the entire optical interface to just a handful of components. Essentially, these components would consist of the transmit VCSEL and receive photodiode, a TIA between the photodiode and integrated PMD's post amplifier, a small microcontroller, and the interface to the MAC layer through a serialization/deserialization device.

One additional area in which advanced integration processes are helping to improve the PMD interface for optical modules is in the TIA itself. Currently, the TIA presents a difficult arena for module designers because the performance requirements for 1.25-Gbit/sec applications go beyond standard CMOS capabilities and are best addressed with either bipolar or gallium arsenide (GaAs) solutions. However, GaAs solutions have difficulty performing at 3.3V levels, and GaAs is inherently expensive and lacking in integration possibilities. The use of GaAs-based TIAs therefore often results in unwanted performance compromises and cost, which until recently have been unavoidable in higher-speed designs that are pushing to lower power-supply voltages.

In contrast, silicon germanium (SiGe) process technology now holds the key to resolving this dilemma and giving the optical module designer a new set of options. SiGe is essentially a higher-speed silicon process in which the silicon transistor base is doped with germanium to create supercharged bipolar transistors with speeds as high as 65 GHz. SiGe devices are three to four times faster than the 15 to 25 GHz achievable with best-case silicon. They also can be produced at a small fraction of the cost compared to GaAs. In addition to boosting the transistors' switching speeds, SiGe provides higher current gain, improved output conductance, and excellent noise characteristics.

Besides its high-performance capabilities, SiGe also provides greatly expanded integration opportunities because of its inherent compatibility with standard silicon processes. The successful refinement of SiGe processes and their application to TIA designs have created an option for high-performance TIAs that operate effectively at 3.3V levels and have opened future opportunities for further integrating the TIA into the PMD designs. These SiGe TIA devices will be available in die-only packaging formats that will allow them to be efficiently integrated right next to the photodiode within the same housing. SiGe-based TIAs have already demonstrated transimpedance capabilities in the 10,000-ohm range, constituting as much as a 10-fold performance increase over GaAs designs.

One of the major challenges to the high-volume deployment of high-speed optical links will be the creation of cost-effective, robust, standards-based optical transceiver components that can support gigabit-per-second bandwidths. In contrast to the traditional hard-soldered form factors used in copper-based Ethernet and Fiber Distributed Data Interface implementations, Gigabit Ethernet and Fibre Channel links can now be implemented using complete module-level pluggable transceivers based upon the widely adopted industry-standard gigabit interface converter (GBIC) form factor. Not only do interchangeable GBICs give network administrators the flexibility to custom tailor their network topologies, link distances, and costs to their specific requirements, GBICs also allow for subsequent reconfiguration of the network as needs change, without wholesale replacement of system-level investments.

However, the cost-effective design of pluggable GBIC modules is predicated on the availability of highly integrated, low-power components that can fit smoothly within the GBIC form factor without sacrificing either reliability or performance. The integrated PMD components described above form a key enabling technology for the cost-effective design and manufacture of GBIC modules.

By using microcontoller intelligence and eliminating the need for external trim circuitry, these components significantly reduce the overall module cost and complexity while simplifying the manufacturing process and reducing the requirement for hand-tuning by skilled labor. In addition, the components can be spaced much more closely together because manual-trimming access is no longer required.

By shifting the major cost and complexity burdens out of the PCB manufacturing process and into the chip-level designs, new-generation components such as highly integrated intelligent PMD laser drivers, post amplifiers, and TIAs have opened the door for high-volume, low-cost production of fiber-optic GBIC interfaces. These new components will help spur forward the escalating fiber-optic revolution by allowing inexpensive and interchangeable GBIC modules to become as pervasive and easy to use as today's ubiquitous Ethernet network interface cards.

Robert Schuelke is a senior IC design engineer with AMCC's Minneapolis Design Center (Minneapolis, MN).

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