OIF to tackle metro 100G, new gearbox, chip-to-chip communications

The Optical Internetworking Forum (OIF) launched three new projects at its third-quarter meeting last week. The projects will investigate extending the organization’s work in long-haul 100-Gbps DWDM to intermediate-reach application such as the metro, create the second generation of its Multi-Link Gearbox specifications, and look at optical engines for chip-to-chip communications.

Metro applications of 100-Gbps have become an area of interest for carriers and vendors alike. However, it also has threatened to become fragmented, as some vendors have touted coherent-based approaches similar to that specified within the OIF’s 100G DWDM work, while others have pursued direct-detect methods based on 4x28-Gbps technology (see, for example, "ADVA Optical Networking offers cost-reduced 100-Gbps for metro networks" and "ECI Telecom targets metro 100-Gbps via 4x28G with MultiPhy"). As the OIF’s long-haul work created an industry consensus around a single modulation format – dual-polarization quadrature phase-shift keying (DP-QPSK) with coherent detection – that the industry lacked at 40 Gbps, stepping into an increasingly bifurcated intermediate-reach applications space would appear to be a natural move.

However, it is too early to tell whether the group working on this project will merely attempt to drive consensus around a lower-cost, streamlined version of coherent-enabled DP-QPSK or bring non-coherent 100G approaches within the OIF umbrella, according to spokesman Dave Stauffer, chair of the OIF’s Physical and Link Layer (PLL) Working Group. The project members likely will begin to examine this aspect at the OIF’s next quarterly meeting, October 16-18 in Hawaii, he told Lightwave.

Stauffer’s PLL Working Group will have its hands full at that meeting with the other two projects. The Multi-Link Gearbox 2.0 project will build on version 1.0 of the specifications, with a particular emphasis on the aggregation challenges of marrying board-level interfaces designed to support the IEEE’s 40- and 100-Gigabit Ethernet multi-lane approach with the generally higher-speed interface requirements of optical modules. Stauffer hopes that this project will establish a path that can be followed when transmission rates exceed 100 Gbps in the future.

The third project will address emerging requirements for high-speed chip-to-chip interconnect. Several companies have devised optical approaches for these applications (see, for example, “Avago Technologies offers 120 Gbps parallel optics in CXP, MiniPOD formats”), and the OIF hopes to drive further innovation by establishing common specifications for the electro-mechanical footprint of such optical engines, including power and high-density connectivity. The fact that some approaches on the market split the transmit and receive functions into separate modules while others take an integrated approach is one of the challenges this project will have to address, Stauffer conceded.