In a transceiver, the transmit section converts a serial emitter-coupled logic, or ECL, data stream into optical signals. A light-emitting diode, or LED, driver circuit converts the ECL input into a modulation current for the high-speed surface-emitting LED. An ECL "high or 1" pulse level at one input of the input buffer activates the LED; an ECL "low or 0" pulse level deactivates the LED. The bias generator controls the LED modulation. Special input buffer-compensating circuitry ensures nearly constant output power and performance throughout extremes of temperature and power supply.
No encoding is performed by the transmitter; the optical signal is a shaped emulation of the input data. The data stream can be modulated from DC up to the maximum data rate capacity of the transceiver.
The receiver produces an ECL replica of the incident optical signal. Most high-speed fiber-optic receivers compare the incoming signals with its average to determine whether a "1" or "0" was transmitted. The data stream must be balanced at a 50% duty cycle--equal number of 1s and 0s--over the integration period of the signal-averaging circuits. If this is not the case, the threshold generated by the averaging circuit will drift toward the "1" or "0" level. This drifting reduces the signal-to-noise ratio (and therefore the sensitivity) and also increases pulsewidth distortion.
Wide duty-cycle variations can wreak havoc with the performance of typical AC coupled receivers, particularly on sensitivity and data-dependent jitter (pulsewidth distortion due to the dynamic characteristics of the data). Most transceivers are circuit-compensated to overcome these variations and to widen duty-cycle operation. The expanded duty cycle allows flexibility in the choice of a data coding scheme. For example, in FDDI applications, long-term 40% to 60% duty-cycle data patterns occur frequently.