Single-crystalline mirrors for flatter MEMS scanners

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Sunny Bains

At the University of California at Los Angeles (UCLA), researchers have used silicon-on-insulator (SOI) technology to make high-quality micro-optomechanical scanners. The UCLA team, lead by Ming C. Wu, claims that their new batch-fabrication process has the advantages of conventional micromachining while providing a much flatter, and therefore less optically distorting, mirror surface. The 460 x 460-µm two-dimensional scanners produced so far have a scan angle of ±7.5° and a radius of curvature 150 times better than using conventional techniques.1 Surface roughness was less than 10 nm.

The first step in building these devices is to fabricate conventional microelectromechanical systems (MEMS) using the standard multiuser MEMS process. Next, a thinned SOI wafer is bonded to the chip using photoresist. This wafer essentially consists of a layer of silicon dioxide (SiO2) sandwiched between two layers of single-crystal silicon. Next, the top crystalline layer is removed using deep reactive-ion etching (DRIE; the chip below is protected with photoresist) and stopped by the SiO2 layer, which is in turn removed with hydrogen fluoride.

The next stage is to fully pattern the remaining layer of silicon by using a mask to align a new layer of photoresist with a marker embedded in the MEMS chip. Once this is in place, DRIE can again be used to remove the unwanted silicon and then the protective layer of photoresist (both across the top of the mirror and the rest of the chip) can be removed.

Using an interferometric optical profiler, the UCLA team was able to show the difference that the single-crystal silicon made to quality of the mirror (see figure). Where the radius of curvature was 1.8 cm across the 4.25-µm-thick polysilicon layer, it was 265 cm across the 22.5-µm-thick mirror created using the new technique. The optical advantage was also evident. The image of a 0.28-mm laser spot was measured at 2.04 mm (full-width half-maximum) for the polysilicon mirror, and just 0.3 mm for the SOI-based device.

For more information contact Guo-Dung John Su at johnsu@icsl.ucla.edu.

REFERENCE

  1. Guo-Dung J. Su, Hiroshi Toshiyoshi, and Ming C. Wu, IEEE Phot. Tech. Lett. 13 (June 2001).

Sunny Bains is a scientist and journalist based in London, England.

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