Centellax Inc. plans to preview an upcoming bit-error-rate test system (BERT) for 16X Fibre Channel (FC-16), 40-Gbps DQPSK (2x22G), and 100G (4x28G) at its booth during OFC/NFOEC.
The SSB32 2011 that will be on display at booth #1815 is designed to offer affordable pattern generation and error detection capabilities for applications at data rates up to 32 Gbps. The pattern generator and error detectors are also available in SSB17 models with hardware tuned to operate up to 17 Gbps for 16X Fibre Channel designs.
The SSB32 consists of a controller and pattern generator and error detector remote heads. Centellax says its modular architecture enables the user to put the pattern generator and error detection near the device under test, eliminating long cables that can degrade signal quality – a factor that is especially important at 32 Gbps, the company adds.
The pattern generator and error detector remote heads operate from 2 to 32 Gbps in a single band with no gaps or missing data rates, Centallax says. They generate and test full rate patterns directly without the need for external multiplexers and delay matching often used in other modular BERT systems, the company adds. They also are designed to produce a selection of PRBS pattern lengths, along with a large selection of common telecom, datacom, and clock stress test patterns including K28.5, CJPAT, CJTPAT, etc.
Centellax calls the signal fidelity in the eye “outstanding.” Meanwhile, such output parameters of amplitude, offset, and termination voltage are user settable.
“This next-generation BERT offers industry-leading 32-Gbps performance in a compact form factor at a surprisingly affordable price,” asserts Steve Sekel, Centellax vice president of product management. “The full-rate operation eliminates the complexity and calibration needs of multiplexed sub-rate techniques used in older generation card modular products. Coupled with our Signal Integrity Studio software, the solution is extremely easy to set up and use.”
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