Status Report: Full Duplex DOCSIS

Oct. 19, 2016
By Monta Monaco Hernon - Specification development for Full Duplex DOCSIS is underway at CableLabs. Originally announced at the 2016 ...

Specification development for Full Duplex DOCSIS is underway at CableLabs. Originally announced at the 2016 Winter Conference, the project transitioned in June from the innovation phase to R&D. The first face-to-face meeting took place in Louisville, CO, in August, and working group meetings will continue to take place regularly until the specification process is complete.

While during innovation work is focused on concept validation and work is not shared externally, R&D is a joint, industry-wide effort with collaboration among CableLabs, vendors and members, said Belal Hamzeh, VP research & development, wireless technologies, CableLabs.

Full Duplex is a feature update of DOCSIS 3.1 and not a complete rework of the specification. It offers the promise of symmetrical 10 Gbps on 1 GHz HFC networks. The upstream and downstream utilize the same spectrum simultaneously, which doubles the efficiency and capacity.

One of the first contributions from the vendor community is Cisco's (NASDAQ:CSCO) silicon reference design, which provides an approach to interference and echo cancellation at the R-PHY node.

"(This) is aligned with the Full Duplex DOCSIS technology development effort. Interference and echo cancellation is one of the elements that make Full Duplex DOCSIS 3.1 possible," Hamzeh said.

When BTR spoke with Hamzeh earlier this year, he likened the concept of sharing the same spectrum to two people talking at the same time, but still understanding one another, even if one is yelling and one is whispering.

By the time upstream signals reach the CMTS, the power can be much lower than the signal power coming out of the CMTS. Specifically, the CMTS transmits at around 60 dBmV, but receives closer to 0 dBmV. The self-interference cancellation and intelligent scheduling components of DOCSIS 3.1, which will be used by Full Duplex, will allow the CMTS to essentially subtract its own transmission from what it is receiving.

Cisco's silicon reference design takes advantage of these components to maximize the use of HFC capacity and provide a scalable multi-gigabit return path, Hamzeh said.

"The ecosystem support for Full Duplex DOCSIS 3.1 technology has been staggering, with many vendors collaborating and contributing to the development of the technology," Hamzeh added.

When asked what specifically looks promising Hamzeh said: "The current momentum behind deploying DOCSIS 3.1 technology in the MSO networks is exciting, to see a technology being developed and deployed in such a short time."

CableLabs could not share anything else about what was discussed at the recent meeting, the challenges the group is facing related to Full Duplex, or the timeline.

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