Product Profile: ‘MSPP-on-a-chip’ speeds access edge deployment
From fabless semiconductor company Crimson Microsystems (Sunnyvale, CA), the Ruby CM4800 “MSPP-on-a-chip” enables the design of SONET/SDH-compliant access edge multiservice provisioning platforms (MSPPs) incorporated within a 1-4-RU chassis-compact devices otherwise known as micro-MSPPs.
“The trend right now is to shrink these boxes down to the size of a pizza box, primarily to accelerate their adoption at the access edge, and to reduce the space they occupy in a central office,” says Bhanu Nanduri, Crimson’s vice president of sales and marketing, Asia. “We’ve integrated about five to six devices into the Ruby-it’s like a Swiss army knife.”
The company says the device’s highly integrated design can ultimately replace up to eight discrete components. The chip integrates a multirate SONET/SDH (VT/TU) pointer processor with a multirate framer capable of supporting full line and path termination for multiple STM-1/4/16 and equivalent OC-3/12/48 streams. The device also supports 22.5-Gbit/sec nonblocking fully channelized high-order (AU/STS) and low-order (VT/TU) crossconnection, which enables on-chip grooming and line- or path-based protection switching to and from redundant backplane interfaces as well as add/drop functionality to and from a 2.5-Gbit 77.76-MHz telecom bus interface.
The company says the device’s integrated support for both SONET/SDH line- and ring-based protection schemes as well as the 22.5-Gbit/sec crossconnect means that MSPPs based on the device can be deployed directly on a SONET/SDH access ring or as customer-located equipment on SONET/SDH access links. “We have 10 gig worth of data that can come through the line side,” notes Nanduri. On the system side, the device has two ports: redundant and working. “Each port supports 10 gig of traffic, which is internally multiplexed to generate a single stream of 10-gig traffic that flows into the system-side framers,” Nanduri explains.
The company says the device provides all necessary SONET/SDH processing for up to four STM-16/OC-48s, 16 STM-4/OC-12s, or 16 STM-1/OC-3s. Supported protection switching schemes include MSP/APS, SNCP/UPSR, and MS-SPring/BLSR. The device’s pointer processor, path termination, and crossconnect functions simultaneously support any combination of high- and low-order paths.
“The crossconnect that they have is really a pole or bore crossconnect that you might get from a PMCC or a Vitesse, which is integrated with the framer,” observes Jag Bolaria, a senior analyst at the Linley Group. “So, they can [achieve] this nonblocking [performance] both for high-order and low-order [transmissions], which nobody’s really doing today-you’d have to get separate devices for low-order from somebody and then another device for high-order. So it’s a very targeted chip for micro-MSPP platforms.”
All of the device’s functions can be controlled and monitored via an external processor; however, an on-chip 32-bit control-plane processor can also be used for provisioning, performance monitoring, and protection switching, which the company says significantly reduces the burden on an external processor.
“The key thing in this kind of system is to have a higher level of integration,” continues Bolaria. “Typically, in an MSPP or an ADM [add/drop multiplexer], you’d have SONET on one set of blades-the framing-and then you’d have a switch or a crossconnect on another blade. This [device] kind of slaps it all together. And the whole concept of micro-MSPPs is that you can potentially have a much lower cost of such a device, as compared to full-board MSPP platforms.”
“The benefit,” confirms Nanduri, “is, in a MSPP, with Ruby as the device, you can support multiple line cards with no framers, no processor-all you need is basically the optics. Thereby, the design of these line cards becomes very low, cost-wise.”
Currently sampling, the Ruby CM4800 is priced at $500 in volume. The device is implemented in a 0.13-µm low-power CMOS process and comes in a thermally enhanced FCBGA package. Xalted Networks (Bangalore, India) is currently using the device to implement its access edge MSPP; Crimson notes that the two companies have also collaborated on a reference design aimed at speeding OEM deployments of the chip, especially in Asia.