Cypress samples programmable SONET/SDH OC-48

May 15, 2001
May 15, 2001--Cypress Semiconductor announced the availability of samples of the PSI2G100S, the second in its family of Programmable Serial Interface (PSI) chips.

Cypress Semiconductor announced the availability of samples of the PSI2G100S, the second in its family of Programmable Serial Interface (PSI) chips. The PSI2G100S integrates a SONET/SDH OC-48 (2.5 Gbps) transceiver, clock data recovery (CDR) circuitry, a SERDES, 100k gates of programmable logic, and 240 Kbits of communications memory, targeting OC-48/STM-12 optical terminators, SONET/SDH routers and add-drop MUX subsystems.

The PSI2G100S closely follows the introduction of the PSI2G100, purportedly the first 2.5 Gbps programmable PHY. PSI devices offer operating speeds from 1 x 2.5 Gbps to 8 x 1.5 Gbps to support high-bandwidth applications.

PSI devices combine the flexibility, predictable timing, and ease-of-use of Cypress CPLDs with a SERDES, communications memory and phase-locked loops (PLLs). Cypress's Warp R6.1 software enables a seamless programming interface to allow design engineers to easily integrate custom IP with the SERDES via HDL blocks, HDL text, or graphical state machines. Cypress is the only company to offer a SONET/SDH OC-48 compliant, 2.5 Gbps SERDES, programmable logic gates, design entry, synthesis and verification in an integrated, single-chip solution.

The PSI2G100S is suited for both port and backplane solutions in a typical line card application. Its programmability enables customers to create customized and flexible solutions for the parallel-side. The devices in the PSI family provide a programmable interface to a SERDES that is compatible with various physical layer transmission media -- fiber optic modules, copper cables, and circuit board traces. Along with optimized communications memory (such as dual-ported and FIFO memories), logic and PLLs, the ICs will provide parallel programmable I/Os supporting LVCMOS, LVTTL, 3.3 Volt PCI, SSTL2, SSTL3, HSTL, and GTL+ inputs. The combined serial bandwidth of 200AMbps to 12 Gbps will allow PSI devices to meet the requirements of a broad range of market segments.

The PSI2G100S is available in a 456-ball BGA package. Volume pricing for the SONET/SDH OC-48, 2.5 Gbps, 100k-gate, devices is $150.

About Cypress:

Cypress Semiconductor provides high-performance integrated circuit solutions to fast-growing markets, including data communications, telecommunications, computation, consumer products, and industrial control. For more information, visit

Sponsored Recommendations

Coherent Routing and Optical Transport – Getting Under the Covers

April 11, 2024
Join us as we delve into the symbiotic relationship between IPoDWDM and cutting-edge optical transport innovations, revolutionizing the landscape of data transmission.

Data Center Network Advances

April 2, 2024
Lightwave’s latest on-topic eBook, which AFL and Henkel sponsor, will address advances in data center technology. The eBook looks at various topics, ranging...

Supporting 5G with Fiber

April 12, 2023
Network operators continue their 5G coverage expansion – which means they also continue to roll out fiber to support such initiatives. The articles in this Lightwave On ...

FTTx Deployment Strategies

March 29, 2023
Cable operators continue to deploy fiber in their networks at anincreasing rate. As fiber grows in importance, proper choices regardinghow to best fit fiber to the home together...