SOI-CMOS MUX/DEMUX

Jan. 1, 2001

A multiplexer and demultiplexer is made with 18-µm silicon-on-insulator CMOS technology. Each chip dissipates a maximum of 0.5 W at 2.488 Gbit/s on 1.8 V. The 16:1 multiplexer has phase-lock loop, the interface is 1.8-V pseudo emitter coupled logic, and jitter is ITU-T G.958 standard.

Mitsubishi Electronic Device Group

Sunnyvale, CA

www.onlinecenter.to/lfw

Sponsored Recommendations

March 10, 2025
The continual movement around artificial intelligence (AI) cluster environments is driving new sales of optical transceiver sales and the adoption of linear pluggable optics (...
April 10, 2025
The value of pluggable optics in open-line systems is also becoming more apparent. This webinar describes this trend and explores how such modules can best be employed. Register...
March 25, 2025
Explore how government initiatives and industry innovations are transforming rural broadband deployments, overcoming cost and logistical challenges to connect underserved areas...
April 25, 2025
This webinar will examine trends and advancements at the system and optical module levels for data center interconnect. Register today to join the discussion.