Opto IC at 100Gbit/s is 'fastest'

NTT Photonics Laboratories reported at December's International Electron Devices Meeting in San Francisco, that it has employed indium phosphide to develop a technology that allows the integration of high electron mobility transistor circuits with gate lengths of just 100nm into a new circuit structure. This structure has achieved error-free "record" 100Gbit/s switching rates.

The IC comprises both multiplexer and demultiplexer circuits to convert between lower-bit-rate parallel signal and high-speed serial signal by time division multiplexing.

A 100Gbit/s mux/demux IC could enable network equipment speeds to be raised 10-fold from the current 10Gbit/s.

As data traffic continues to rise, terabit transmission capacity will soon be required. Since TDM technologies allows more information to be transmitted over a single fibre, a TDM system that achieve 10Gbit/s are already in practical use and 40Gbit/s systems are being developed.

However, the communication speed of a TDM system is limited by the operational speed of the ICs at the core of the optical transmitter/receiver of the network equipment. To accelerate the system, these devices need higher-speed transistors and design technologies that support the implementation of ultra-high-speed circuits.

Many research organisations are currently trying to develop ultra-high-speed ICs with the goal of realising 40Gbit/s optical communication systems. Error-free operation of a 40Gbit/s-class IC has already been reported. However, at higher speeds, error-free operation of ICs has not yet been reported. ITT.Claims that until now, no one has succeeded in realising an IC that operates beyond 100Gbit/s. This is because of two main reasons:

Now that NTT Photonics Laboratories has made advances in indium phosphide circuit design and device production technology and succeeded in breaking the 100Gbit/s barrier.

NTT has (1) developed the device integration technology that can uniformly produce InP high electron mobility transistors with 200GHz-class current gain cut-off frequency on one semiconductor chip; and (2) the company has realised ICs that combine ultra-high-speed operation with large output amplitude through the development of a new circuit structure that dispenses with the buffer circuit.

Realising a multiplexer/demultiplexer IC with 100Gbit/s performance demands a transistor with a current gain cut-off frequency of about 200GHz. All transistors integrated on the same semiconductor chip must have the same threshold and their drain conductance must be sufficiently lower than their transconductance. NTT Photonics Laboratories developed an extremely regular crystal growth technology that realises an epitaxial structure with a high degree of accuracy, including an InP gate recess etch stopper layer, and sub-100nm gate fabrication technology. This allowed NTT to produce a transistor with high performance and excellent uniformity.

Secondly, a conventional circuit structure needs an output buffer circuit to drive the output driver circuit, so the speed of the whole circuit is restricted by the characteristics of the output buffer circuit. To avoid this restriction, NTT found a way for the IC to directly drive the external load from the selector core part. Eliminating the output buffer circuit is a major source of the speed enhancement. Also, NTT adopted the peaking technique in the selector core to further enhance the bandwidth; error-free operation is now possible at 100Gbit/s.

This multiplexer IC realises ultra-high-speed operation while achieving a large output amplitude of 1V, so it is expected to have broad application.

NTT has succeeded in electrically multiplexing/demultiplexing a 100Gbit/s signal. It intends to continue its efforts to achieve higher processing speeds and more advanced implementation technologies. Further enhancements and cost reduction for broadband networks will enable transmission of content such as high-resolution video data and high-volume data sets.