ClariPhy clarifies market direction, touts technology advancements

February 6, 2006 Irvine, CA -- ClariPhy Communications today emerged from stealth mode with a mixed-signal integrated circuit (IC), which it claims sets new performance benchmarks for multi-gigabit/sec communications applications, reports Lightwave senior news editor Meghan Fuller.

February 6, 2006 Irvine, CA -- ClariPhy Communications today emerged from stealth mode with a mixed-signal integrated circuit (IC), which it claims sets new performance benchmarks for multi-gigabit/sec communications applications, reports Lightwave senior news editor Meghan Fuller.

ClariPhy's initial product will be a 10-Gigabit Ethernet (10GbE) PHY targeting the emerging 10GBase-LRM Ethernet standard, nearing IEEE ratification. However, the device will be applicable for all serial optical standards, notes Dr. Paul Voois, president and CEO of ClariPhy.

The company has developed what it claims is the first digital signal processing (DSP)-based PHY for 10 Gbits/sec over multimode fiber. Its PHY "will exceed 300-m reach over legacy multimode fiber, thereby enabling a seamless and cost-effective upgrade of existing Ethernet infrastructure to 10-Gbit/sec speeds," reports Voois. "For new installations, our technology will enable the best combination of power dissipation, reach, and latency of any PHY over any cabling medium," he adds.

ClariPhy's technology includes Maximum Likelihood Sequence Detection (MLSD)--also known as Maximum Likelihood Sequence Estimation (MLSE)--a powerful algorithm for compensating modal dispersion that enables the vendor's IC to exceed the desired 300-m distance. Voois admits that MLSD is "widely considered to be impossible, impractical, and science fiction" at 10-Gbits/sec and at low enough power for multimode fiber/enterprise applications, but his company plans to prove the naysayers wrong.

MLSD promises improved performance over Decision Feedback Equalization (DFE), the technology of choice among ClariPhy's competitors. According to Voois, his company's MLSD-enabled technology provides 99% coverage at the 300 m, whereas the DFE alternative provides about 90% coverage.

"Vertical riser connections in the enterprise require 300-m reach over legacy multimode fiber and have historically been addressed by 10GBase-LX4," notes Jag Bolaria, senior analyst with the Lindley Group. "ClariPhy's implementation of EDC with innovative digital signal processing techniques in CMOS addresses these performance requirements -- and at a lower price point."

An important feature in the company's roadmap is support for existing optical module form factors as well as emerging form factors such as SFP+. SFP+ is a next-generation form factor for 10-Gbits/sec sec that offers several advantages, including a smaller size than the XFP (which enables higher port densities), reduced component count, and lower power dissipation.

The SFP+ form factor first emerged in the Fibre Channel world. The SFP proved adequate at 1-, 2-, and 4-Gbit/sec Fibre Channel, but 8-Gbit/sec required a new form factor with the same footprint and power consumption but different electrical characteristics. Now, there's a strong push within the industry to use SFP+ to support 10-GbE applications as well.

Traditionally, ICs reside in optical modules from the likes of JDSU or Opnext. These optical modules are hot pluggable into the back of the switch. But using SFP+, the chip can be placed directly on the line card, which interfaces directly onto the serial module.

"Sumitomo Electric is committed to being a leader in the 10-Gbit/sec optical communication components market, and the SFP+ serial form factor that ClariPhy supports is a development that we have been following for some time now," says Eddie Tsumura, vice president of marketing and engineering at ExceLight Communications (Durham, NC), a subsidiary of Sumitomo Electric. "And we believe that our optical modules, integrated with ClariPhy's technologies, can deliver significant customer value in terms of cost and performance advantages."

Compared with the XFP form factor, SFP + is 30% smaller, burns less power, and requires fewer silicon components. As a result, it is less expensive than the XFP, a critical requirement for cost-sensitive LRM applications.

But the main reason to adopt SFP+, says Voois, is to minimize fragmentation in the market. System vendors like Cisco would like one form factor to satisfy the needs of the SR, LR, and LRM markets.

Data center applications

ClariPhy will also target the 10-GbE enterprise data center market, where it believes its products will compete favorably with existing and emerging copper technology. In such applications, reach is less of a "pain point," notes Voois, and the installed cabling plant doesn't matter.

The key issues for data center applications are power, latency, and cost. ClariPhy's DSP-based IC features half the power of the 10GBase-T copper alternative, says Voois. It consumes less than 2 W of power versus 5 W at least for the copper approach. ClariPhy's IC also betters the 10-GBase-T's 3-msec latency, says Voois, who believes his company's products will beat the competition on price too. The ICs are manufactured using a standard (90-nm) CMOS process, which enables increased integration and lower costs.

The company has not begun sampling silicon yet, but it is in discussions with leading vendors for evaluation and development programs. ClariPhy engineers also are active in several standards bodies, including the IEEE 802.3aq Task Force, which is responsible for developing the 10GBase-LRM standard, as well as the T11.2 Fibre Channel Optical Working Group and the SFP Committee, which is charged with developing the SFP+.

--Meghan Fuller

More in Home