The Optical Internetworking Forum (OIF) has announced the start of three new electrical interface projects aimed at high-speed, low-power electrical interfaces for 56-Gbps applications. The interfaces would support the design of products that support data rates in excess of 100 Gbps.
The projects were proposed last month at the OIF’s second quarter meeting in Dubrovnik, Croatia. They include:
- The Ultra Short Reach Electrical Interface project will define a link of less than 10 mm between an ASIC and an optical engine (OE) at data rates up to and including 56 Gbps. Such an interface will support the development of multi-chip modules (MCMs) and alternative packaging schemes optimized for minimum power consumption.
- The Close Proximity Electrical Interface project will define a link with a reach of less than 50 mm from chip to discrete OE at data rates up to and including 56 Gbps. This effort aims to facilitate an efficient board mounted OE at low power.
- The CEI-56G-Very Short Reach project will determine an optimal modulation format based on measurements, verification, and CMOS switch ASIC I/O capability. The project covers single-lane electrical I/O data rates beyond 28 Gbps needed for future chip-to-module applications, including single-lane interfaces for 40-Gbps modules and 8-10 lane interfaces for 400-Gbps modules.
“These projects address different elements of the important electrical interface beyond 100G transmission, where speed and power will become an increasingly difficult issue,” said Dave Stauffer of IBM Corp. and the OIF’s Physical and Link Layer Working Group Chair. “Based on our Common Electrical Interface (CEI) work, the industry has turned to the OIF to drive the next phase in electrical interfaces which will include data rates up to 56 Gbps.”