The S2042 and S2043 transmitter and receiver pair perform high-speed serial data transmission over fiber-optic or coaxial-cable interfaces conforming to ANSI X3T11 Fibre Channel specification. The chipset is selectable to 1062-, 531- or 266-Mbit/sec data rates and performs parallel-to-serial and serial-to-parallel conversion and framing for block-encoded data. The S2042 on-chip phase-locked loop synthesizes the high-speed clock from a low-speed reference. The S2043 on-chip phase-locked loop synchronizes directly to incoming digital signals to receive the data stream. The TTL, or transistor-transistor-logic, input/output section operates from either a 3.3V or a 5V power supply and typically dissipates at 1 watt.
Applied Micro Circuits Corp.
San Diego, CA