Phyworks 10G CMOS transceiver integrates temperature sensor, diagnostics

SEPTEMBER 21, 2009 -- Designed for 10GBase-SR and 1G to 8G Fibre Channel SFP+ optical applications, the PHY3070 can be used with an external junction-temperature monitoring transistor to improve module temperature sensing accuracy.

Pennwell web 200 280

SEPTEMBER 21, 2009 -- Telecom chip manufacturer Phyworks says it has introduced the first single-chip transceiver in CMOS to offer an integrated +/-3°C temperature sensor and diagnostic reporting. Designed for 10GBase-SR and 1G to 8G Fibre Channel SFP+ optical applications, the PHY3070 can be used with an external junction-temperature monitoring transistor to improve module temperature sensing accuracy. This reduces measurement variance due to the influence of IC temperature. Integrating the sensor also cuts cost and saves space.

The device combines enhanced diagnostics with a 1-to-10.6-Gbps vertical cavity surface-emitting laser (VCSEL) driver and a high-performance limiting amplifier. To help reduce operating and environmental costs, it has been designed to enable sub-750-mW modules.

The PHY3070 replaces many functions normally handled in an external microcontroller by providing readings of temperature, transmit power, receive power, bias current, and supply voltage. Reporting is performed via the chip's two-wire serial interface, with an 8-bit microcontroller required for SFF-8472 compliant digital diagnostics monitoring and device setup.

The transmitPennwell web 200 280ter output stage will drive four-terminal VCSEL transmit optical subassemblies (TOSAs) differentially using AC coupling and provides comprehensive safety shutdown functions. The driver delivers a maximum peak-to-peak modulation current of 12 mA and offers two laser control modes: open loop or digital mean-power, the latter using an integrated automatic power control (APC) loop that further reduces the functions and cost of an external microcontroller and improves startup time by removing an external interface and associated delay.

On the receiving side, a high performance limiting amplifier with a 100-ohm differential input termination is directly AC-coupled to a transimpedance amplifier. The receiver chain includes a low-pass filter with programmable cutoff frequency, enabling the transceiver to support five discrete data rates in the range from 1 to 10.6 Gbps. The output of the receiver employs programmable pre-emphasis to equalize the distortion associated with the SFP+ module PCB and connector.

The PHY3070 transceiver is provided in a 32-pin 5x5-mm QFN package with an operating temperature range of -40° to +95°C. It is supported by a reference module, schematics, Gerber files, SFP+ host board with GUI, and firmware. The chip can also be made available as a bare die to suit specific custom build requirements.


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