DECEMBER 9, 2009 -- GigOptix, Inc. (OTCBB:GGOX) has announced the introduction of its second-generation CX7800 hybrid ASIC technology in 65 nm. Hybrid ASICs combine embedded metal-configurable digital logic with standard cell logic, input/output (I/O), memory, and mixed-signal intellectual property.
GigOptix says using hybrid ASICs rather than pursuing a standard SoC electronics development approach enables more rapid and economical product line development. Companies can introduce products five weeks faster than 65-nm standard cell technology allows, while they can also save an average of $500,000 in non-recurring engineering (NRE) and tooling costs on each derivative product, GigOptix asserts.
An SoC developed in 65-nm standard cell technology results in the smallest device size, best performance, and lowest power consumption, compared with FPGA and structured ASIC devices in the same process geometry, GigOptix says.
Producing a series of custom products becomes capital intensive and often prohibitive for many companies. Structured ASICs solve the problem of high up-front costs and long lead times, but the level of integration is often limited to available platforms and sizes. A hybrid ASIC gives developers the benefits of standard cell and structured ASIC without the tradeoffs, the company says. Prototype lead time can be less than 6 weeks from tape-out to fully packaged and tested parts, GigOptix asserts.
"Companies that are risk averse, yet want to introduce products with complex SoC solutions to the market are finding themselves trapped with compromised options," said Elie Massabki, vice president and general manager of the GigOptix ChipX product line. "Hybrid ASICs offer standard cell device costs and performance without the lead time and risks associated with standard cell designs."
GigOptix Hybrid ASICs are ideal for numerous design applications including consumer products, communications, data processing, industrial and defense systems.
The number of metal layers used in hybrid ASICs for routing can be customized from four to seven, depending on the design complexity as well as performance, cost, and time-to-market customer requirements. Other key features GigOptix identifies include:
- VDD of 1.2 V
- six to nine copper metal levels, including up to six 1x, five relaxed-pitch 2x, and two relaxed pitch 4x metal levels
- up to three threshold voltages: high, standard, and low
- operating junction temperature range of -40 to 125oC
Hybrid ASIC products are customer specific and can have up to 50M ASIC gates. Through its ecosystem of "Trusted IP Suppliers," GigOptix offers a wide range of IP, including PCI Express, SerDes, USB, data converters, PLLs, CPUs, physical layer cores and controllers, as well as more than 200 blocks of synthesizable IP. Hybrid ASIC designs follow industry standard design flows and require only standard EDA tools, GigOptix adds.
GigOptix says it will start 65-nm hybrid ASIC designs in January 2010.