TPACK, Cypress partner on reference design for Ethernet switches and traffic managers

MARCH 2, 2010 -- Cypress Semiconductor Corp. (NASDAQ: CY) and TPACK have announced a reference design for “ultrafast” Ethernet switches and queue management applications. The new Springbank reference design combines TPACK’s TPX4004 high-capacity integrated packet processor and traffic manager with Cypress’s CY7C15632KV18 72-Mbit Quad Data Rate II+ (QDRII+) SRAMs.

MARCH 2, 2010 -- Cypress Semiconductor Corp. (NASDAQ: CY) and TPACK have announced a reference design for “ultrafast” Ethernet switches and queue management applications. The new Springbank reference design combines TPACK’s TPX4004 high-capacity integrated packet processor and traffic manager with Cypress’s CY7C15632KV18 72-Mbit Quad Data Rate II+ (QDRII+) SRAMs.

The combination offers the fastest available speeds with roadmaps for simple upgrades, the companies assert. The TPACK reference design also is designed to provide an easy interface to various FPGAs and is backed by robust application support, according to the company.

TPACK says its 40-Gbps TPX4004 provides true Metro Ethernet Forum (MEF)-defined, carrier-class performance. The Layer 2 product is designed to offer the ability to adapt to different system architectures and requirements. Meanwhile, Cypress says the QDRII+ SRAMs are the first to go into high-volume production on 65-nm linewidth. The Cypress SRAMs feature a clock speed of 550 MHz and a total data rate of 80 Gbps in a 36-bit I/O width QDRII+ device, using half the power of 90-nm SRAMs.

The TPACK Springbank reference design is currently available.

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