Vitesse PHYs target high-density Carrier Ethernet, mobile backhaul, and enterprise networks

AUGUST 10, 2010 -- Vitesse Semiconductor Corp. has introduced its latest 10G Ethernet physical-layer SerDes. Designed for high-density 10G aggregation in emerging 40G/100G Ethernet backbones, mobile backhaul/transport, and enterprise networks, the VSC8488 and VSC8484 dual and quad Ethernet PHYs are the first such devices brought to market that support Synchronous Ethernet and other precision timing capabilities, along with working and protection failover capability required to meet carrier resiliency requirements, Vitesse asserts.

AUGUST 10, 2010 -- Vitesse Semiconductor Corp. (Pink Sheets: VTSS) has introduced its latest 10G Ethernet physical-layer SerDes. Designed for high-density 10G aggregation in emerging 40G/100G Ethernet backbones, mobile backhaul/transport, and enterprise networks, the VSC8488 and VSC8484 dual and quad Ethernet PHYs are the first such devices brought to market that support Synchronous Ethernet and other precision timing capabilities, along with working and protection failover capability required to meet carrier resiliency requirements, Vitesse asserts.

The VSC8488 and VSC8484 integrate numerous differentiating features, Vitesse says:

  • Both devices include a crosspoint switch, enabling easier design of redundant failover systems
  • Vitesse says its analog electronic dispersion compensation (EDC) implementation results in a total path latency of 1 ns, compared to DSP-based latencies measuring hundreds of nanoseconds, thus enabling low-latency system design
  • Both devices support 40GBase-KR4, 40GBase-CR4, 40GBase-CR10, nAUI, and nPPI high-speed I/O requirements, enabling systems designed today to be ready for upgrade to 40G/100G
  • The chips’ receiver performance and low-jitter SONET-compliant transmit path enables the user to support a broad array of module formats including all of the present XFP, SFP+, QSFP+, and CFP host applications with high system link margin.


For mobile backhaul/transport applications, the devices support Synchronous Ethernet timing, with IEEE 1588 timing support on the near-term roadmap. At the other end of the application spectrum, Vitesse says the devices offer insertion loss and crosstalk compensation capabilities well in excess of the 10GBase-KR backplane standard. The insertion loss compensation ability of 35 dB and insertion loss to crosstalk ratio (ICR) support down to 6 dB exceed KR requirements, according to Vitesse. In addition to supporting signal degradations in excess of the KR link requirements, the devices sustain full KR compliant rate auto-negotiation and link optimization.

“Across the network, from the initial access points at mobile backhaul/transport and broadband to the core, system needs demand rapid and accelerating bandwidth expansion. Additionally, the bandwidth is being added during a transition period in network implementation from SONET/TDM to Ethernet,” said Gary Paules, product marketing manager at Vitesse. “Because the VSC8488 and VSC8484 dual and quad 10G PHYs uniquely address these expansion and transition challenges, designers can accelerate development of 40G/100G Ethernet backbones, mobile backhaul/transport, and Ethernet networks by leveraging the unique capabilities of these new Vitesse devices.”

“Per our latest networking port count analysis released in April, 10G ports shipments approached 2M in calendar 2009 and cumulative 10/40/100G port shipments will grow to 35M by calendar year 2014, a 5-year CAGR of 59 percent,” said Andrew Schmitt, directing analyst, optical at Infonetics Research. “Products such as Vitesse’s multichannel 10G SerDes are well positioned to support the ongoing 10G port density ramp along with the migration to 40G and 100G implementations.”

Samples of both the VSC8484 and VSC8488 will be available in August.

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