Xilinx intros Virtex-7 HT FPGAs for 100-400 Gbps applications

NOVEMBER 17, 2010 -- Xilinx Inc. (Nasdaq: XLNX) has announced the Virtex-7 HT FPGAs, which offer up to 16x28-Gbps serial transceiver performance for 100- to 400-Gbps applications.

NOVEMBER 17, 2010 -- Xilinx Inc. (Nasdaq: XLNX) has announced the Virtex-7 HT FPGAs, which offer up to 16x28-Gbps serial transceiver performance for 100- to 400-Gbps applications.

The three members of the Virtex-7 HT FPGA family offer four (in the XC7VH290T), eight (in the XC7VH580T) or sixteen (via the XC7VH870T) 28-Gbps transceivers designed to comply with OIF CEI-28G specifications. In particular, the Virtex-7 HT devices are designed to interface to next-generation CFP2 and QSFP2 optical modules.

“In order to meet the growing market demand for bandwidth, we expect communication equipment vendors will design next-generation 100- and 400-Gbps systems using the emerging CFP2 optical module form factor. This will maximize face-plate bandwidth densities while improving existing form factor power dissipation budgets,” said Christian Urricariet, director of marketing for high-speed optics at Finisar. “Our work with Xilinx shows that their low jitter single-chip solution enables a more simplified approach to implementing these higher port densities by providing a direct 28-Gbps connection between the FPGA and the CFP2 module.”

The Virtex-7 HT devices also have up to seventy-two 13.1-Gbps transceivers and are designed to offer up to 2.8-Tbps full duplex throughput. Xilinx expects the FPGAs to see use in a wide range of applications, from low-cost 100G “smart gearbox” chips with 290,000 logic cells to full 400-Gbps FPGA designs with 870,000 logic cells. Xilinx envisions customers will use members of the Virtex-7 HT family for designs aimed at 100 Gbps, 2x100 Gbps, and 400-Gbps interfaces, with connectivity to legacy system-side interfaces based on 3 Gbps or 6 Gbps as well as 10-Gbps ASICs and ASSPs.

Such designs could add functionality to 100-Gbps line cards supporting OTU4 transponders , muxponders or service aggregation routers; lower-cost 120-Gbps packet processing line cards for data processing; multiple 100 Gigabit Ethernet port bridges; 400-Gbps Ethernet line cards; base stations and remote radio heads with 19.6-Gbps CPRI (Common Public Radio Interface) requirements; and 100-Gbps and 400-Gbps test equipment.

Xilinx is particularly proud of the devices’ jitter performance. The company offers a video on its website that features signal integrity expert Dr. Howard Johnson demonstrating the Virtex-7 HT FPGA’s 28-Gbps serial transceiver using a PRBS31 pattern to highlight a wide open eye and the jitter performance required to interface to CFP2 optics.

ISE Design Suite software tool support for Virtex-7 FPGAs is now available. The first Virtex-7 HT devices are scheduled to be available in the first half of 2012.

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