High-speed optical interconnects break the backplane logjam
A darpa-funded program aims to remove the bottleneck at the daughtercard/backplane interface. Laser micromachining is one key to solving the problem.
J.R. Rowlette, Sr., M.A. Kadar-Kallen, and E.T. Green AMP Inc.
J.D. Stack Digital Optics Corp.
As the complexity of microprocessors increases, so does the demand for input/output. With the clock speed for microprocessors growing at a rate of 30% or greater per year, there is also an ever-increasing demand for bandwidth. This rising demand for input/output and bandwidth is creating a bottleneck at the daughtercard/ backplane interface. The highest-performance electrical backplanes require a 1:1 signal-to-ground ratio in the backplane connector to maintain signal integrity. However, these state-of-the-art electrical backplanes have a signal density of approximately 50 signals per board-edge-inch. Handling high-speed communications at the daughtercard/backplane interface will require significantly higher signal density and bandwidth.
The Polymer Optical Interconnection Technology (point) program funded by the Defense Advanced Research Projects Agency (darpa--baa 93-46) is a technology demonstration program with emphasis on high-speed, high-density parallel optical interconnects for board-to-board communication within the "box" and high-density, separable optical interconnects at the daughtercard/ backplane interface.
The challenge of low cost
Optical interconnects can achieve high signal density, low optical crosstalk, immunity to electromagnetic interference and near-zero insertion force, and a high-bandwidth-distance product. However, cost is a key challenge for penetration of optics into the "box"--the computer or other system within which the boards are enclosed. In long-haul telecommunications applications, the cost of an expensive high-speed source and a receiver does not pose a problem, since it can be divided among many thousands of users. In optical interconnects, this cost must be supported by each individual user. The interconnect budget is approximately 20% of the system cost. This remains fixed regardless of the proposed technology solution, except possibly in some very-high-performance applications
Packaging accounts for a significant portion of interconnect costs. Fundamental to optoelectronic packaging is the alignment of the optical source to an optical wave-guide. This challenge is enhanced significantly when the sources and waveguides are arrays. This has been one of the packaging efforts addressed under the point program.
Polymer planar waveguides
Waveguides are transparent dielectric structures that transport electromagnetic energy. A waveguide structure is composed of two regions: the core and the cladding. Fundamentally, the core must have a higher index of refraction than the cladding region to guide the light.
Waveguides are fabricated using a lithographic process that defines the wave-guide region. The waveguide structure is designed using a computer-aided engineering program that simulates the performance of the waveguides. This program uses an implicit-finite-difference beam propagation method for solving field equations to determine the spatial distribution of the energy and its propagation vectors. The output of the computer-aided engineering program is used to fabricate an electron-beam photolithography mask.
Polyguide, which is licensed by amp from DuPont, is a three-layer laminated structure consisting of a core layer and two cladding layers.1,2 The core wave-guide layer is composed of a polymer matrix layer with a combination of aromatic and non-aromatic monomers dispersed throughout the polymer matrix. The cladding layers are similar in structure but have a lower concentration of monomers. The core layer is laminated to a photolithography mask and exposed to ultraviolet (UV) radiation. The mobile monomers in the mask-defined wave-guide regions of the core layer become polymerized through standard photochemical reactions.
After the cladding layers have been laminated to the top and bottom of the core layer, a secondary diffusion reaction is initiated whereby the unpolymerized mobile monomers in the core layer diffuse into the cladding layers, increasing the index of refraction of the core region relative to the cladding region. This is followed by a final UV exposure and thermal cure cycle to form an integrated waveguide structure (see Fig. 1).
Laser micromachining
In this program we have emphasized the development of laser micromachining as an enabling technology for microfabrication of low-cost packaging and optical interconnects. Our UV precision laser micromachining workstation incorporated both an excimer laser with argon fluoride at 193 nm for area processing and a frequency-quadrupled neodymium-doped yttrium aluminum garnet (Nd:YAG) laser at 266 nm for precision micromachining.
The Nd:YAG laser beam is imaged onto the work surface using a custom-designed objective that is chromatically corrected from 266 nm through the visible region of the spectrum. This objective is diffraction-limited at 266 nm with an F number of 1.43. This objective provides on-axis imaging, which minimizes alignment errors.
The system operates under computer control (see Fig. 2) in both manual and automatic modes. In the automatic mode, a charge-coupled-device camera provides information to a pattern recognition system. This system can be "trained" to recognize alignment fiducials that have been photolithographically created on the part that is to be laser micromachined. The positional accuracy is controlled by laser interferometry. The stages can resolve 10 nm per count and maintain a positional accuracy of 0.1 micron in a vibration-free environment (see Fig. 3).
High-speed optoelectronic packaging
In the development of gigabit transmitter and receiver optoelectronics, one of the key elements is the packaging. In the point program, we are using the Flex high-density interconnect (hdi) multichip module technology, which has been developed at General Electric Corp., Sche- nectady, NY, for very-high-speed interconnects.3 In the "chips first" technology, a layer of interconnects is formed on copper-clad polyimide. There can be many layers of interconnect if required. To keep the complexity low and the yield high, only a few chips are used. These "few chip modules" do not usually require more than two layers of interconnect.
In the point program, this packaging ap-proach has an additional feature. The planar surface provides an ideal platform for interfacing to a polymer wave-guide (see Fig. 4). The major challenge in this approach is the alignment of the waveguide array to the vertical-cavity surface-emitting laser (vcsel) array.
Passive alignment
The development of passive alignment of polymer waveguides to vcsels in the hdi process requires the creation of alignment features in the polymer wave-guide and the hdi substrate. Aligning to fi-ducials photo-lithographically defined during the vcsel fabrication process, kinematic alignment features are laser micromachined into the hdi substrate to receive 400-micron ruby microspheres. These microspheres are inexpensive and have a precision of 0.12 micron. In addition, we have laser micromachined a passive alignment well and slot into the polymer waveguide for the inclusion of 400-micron microspheres. The combination of passive alignment well and slot relaxes the tolerance budget for alignment and thermal expansion (see Fig. 5).
An optical model of the passive alignment process has been developed and experimentally verified. These results indicate that with the tolerances achieved for passive alignment, the waveguide array can be aligned to the vcsel array with less than 0.5 dB loss.
High-density polymer planar waveguide interconnects
The second area of research that we are addressing in the point program is the development of high-speed, high-density optical interconnects at the daughtercard/ backplane interface. As shown in Fig. 6, we have designed and fabricated polymer waveguides with 144 channels. These waveguides have 50-micron multimode cores on 100-micron pitch.
As the number of channels increases, alignment tolerance over the operating temperature range becomes a key design issue. Over the operating temperature range of -40 to +85C with a 50-ppm/C coefficient of thermal expansion, a shift of as much as 45 microns can be expected.
To address this issue, we align the waveguides across the interface on the center pins. The alignment holes in the Polyguide for these holes are laser micromachined with a precision of 1 micron. The outer alignment features are passive alignment slots. This allows the waveguide and the matching opposed waveguide to be aligned accurately with respect to the center pin while being allowed to expand and contract with temperature. This is what we call the smt ferrule.
Optical interconnects at the daughtercard/backplane interface
The point modules have been integrated with high-speed test boards. We have combined this into an optical link for testing. The modules are interfaced to another polymer waveguide that will allow six modules to be interconnected to the smt at the backplane interface. The optical link includes two 45 mirrors and four separable interfaces and 278 mm of optical waveguide with a loss of -10.5 dB. The link was able to achieve 900 Mbits/sec. The optical link and "eye diagram" are shown in Fig. 7.
The smt has been incorporated into a Z-Pack connector format and integrated into a daughtercard/backplane configuration (see Fig. 8).
High-performance backplane connectors that require a signal-to-ground ratio of 1:1 to maintain a signal integrity have a signal density of approximately 50 signals per board-edge-inch. The daughtercard/backplane optical interconnects in this program have a signal density of 250 signals per board-edge-inch. In addition, except for the small insertion force of the alignment pins, the optical interconnect has a zero insertion force.
Conclusion
In summary, we have developed laser micromachining, polymer optical wave-guides as key enabling technologies for optical interconnects. We have demonstrated a working prototype of a high-speed, high-density optical interconnect, its level one optoelectronic packaging, and a high-density, high-bandwidth parallel optical link for board-to-board communications.
One of the key issues for optics in the backplane is alignment tolerances for blind mate requirements. In addition, the potential for failure from the inclusion of dirt in the optical interface for forced-air-cooled systems is also of major concern. To address these issues, we are investigating under point both diffractive and refractive expanded beam approaches for array interconnects. u
Acknowledgments
It is with great pleasure that we acknowledge the many valuable discussions and assistance of Warren Lewis, Terence Ward, Robert Stough, Alan Plotts, Russell Moser, and Douglas Glover.
References
1. B. Booth, "Low Loss Channel Waveguides in Polymers," ieee J. Lightwave Tech., LT-7 (10) (1989), pp. 1445-1453.
2. B. Booth, J. Marchegiano, and K. Steijn, "Polymer Technology for Passive Integrated Optics Applications," Proc. Conf. on Lasers and Electro-Optics, International Quantum Electronics, Anaheim, CA (May 1990).
3. R. A. Fillion et al., "Multichip Modules--Chips First vs. Chips Last Analysis," Proc. 1992 ishm International Symposium on Microelectronics (October 1992), p. 391.
John R. Rowlette, Sr., is a project manager in the Global Optoelectronics Group at amp Inc., Harrisburg, PA. He is the principal investigator for amp on the darpa point program. Michael A. Kadar-Kallen is a project engineer working in the area of laser processing at amp Inc. Eric Green is a senior mechanical designer at amp Inc. Jared Stack was a development engineer in amp`s Global Optoelectronics Group. He is currently a senior engineer at Digital Optics Corp., Charlotte, NC.