Vitesse intros 6.375G SerDes with VScope waveform viewing technology

AUGUST 11, 2008 -- The VSC3441 is the first high-speed SerDes to incorporate Vitesse's VScope waveform viewing technology, which enables a real-time oscilloscope view of the received data, thus providing telemetry of high-speed signals.

AUGUST 11, 2008 -- Vitesse Semiconductor Corp. (search for Vitesse) today announced what it claims is the industry's first multi-protocol 6.375-Gbit/sec multi-rate Serialization/De-serialization (SerDes) transceiver device, the VSC3441. Vitesse says the device is well suited for next-generation backplanes and communication equipment running multiple protocols, including Gigabit Ethernet, XAUI, 2xXAUI, Fibre Channel, Serial Attached SCSI (SAS), Serial ATA (SATA), Serial Rapid IO, Infiniband, and PCI Express (PCIe).

The VSC3441 operates at selected data rates from 125 Mbits/sec to 6.375 Gbits/sec and incorporates advanced equalization to compensate for various impairments and losses encountered in copper cables, backplane traces, and connectors. Further adding to the robust feature set of this transceiver is the combination of integrated technologies, say company representatives: SerDes, Clock and Data Recovery (CDR), and advanced signal equalization. The VSC3441 is also the first high-speed SerDes to incorporate Vitesse's VScope waveform viewing technology, which enables a real-time oscilloscope view of the received data, thus providing telemetry of high-speed signals.

With Internet bandwidth growth averaging 40% per year, networking and storage equipment continues to evolve, creating the need for higher speed serial links to accommodate more bandwidth in backplanes, interconnects, and cable links found throughout the network. Vitesse says the VSC3441 provides OEMs with a significant new tool that allows them to serialize data to these higher rates for simplified transmission through legacy backplanes or cable interconnects. This is achieved by compensating for the signal path degradation, which, in turn, improves the signal integrity performance of the transmission. The integrated VScope waveform viewing technology is then used by OEMs for real-time system diagnostics and remote monitoring functions in these applications. The result is a signal integrity offering that extends the use of existing ASICs and FPGAs with slower speed interfaces.

"With over a decade of leadership in high-speed signal integrity, SerDes, and CDR technologies, Vitesse is uniquely qualified to deliver this product," asserts Juan Garza, product marketing manager for Signal Integrity devices at Vitesse. "By incorporating Vitesse's patented VScope waveform viewing technology into high-speed links, this solution creates a new category for innovative SerDes technology that enables advanced levels of signal integrity quality and remote monitoring," he notes.

With a single reference clock input, the VSC3441 provides a high degree of signal integrity through a configurable input and output equalization. In various modes, the VSC3441 can function as a single 20:1 SerDes with redundant I/O, a dual 10:1 SerDes with redundant I/O, and a quad 10:1 serializer or quad 1:10 deserializer. The high-speed CDR per channel removes random jitter from optical fiber links. I/O characteristics are programmable for interfacing to a wide variety of devices and protocols.

General samples of the VSC3441 device will be available in the fourth quarter of 2008. The VSC3441 is priced at $32 in volume quantities and is available in a 196-pin, 15- x15-mm flip chip ball grid array (FCBGA) package.


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