Semtech announces ultra-high speed ADC/DAC cores

Analog and mixed-signal semiconductors supplier Semtech Corp. (NASDAQ: SMTC) has developed 64-GS/s analog-to-digital converter (ADC) and digital-to-analog converter (DAC) preliminary cores using IBM’s 32-nm silicon-on-insulator (SOI) technology for integration in high-performance system-on-chip (SoC) products.

Analog and mixed-signal semiconductors supplier Semtech Corp. (NASDAQ: SMTC) has developed 64-GS/s analog-to-digital converter (ADC) and digital-to-analog converter (DAC) preliminary cores using IBM’s 32-nm silicon-on-insulator (SOI) technology for integration in high-performance system-on-chip (SoC) products.

Targeting the requirements of advanced communications systems, including optical communications, as well as other applications, these ultra-high-speed data converters enable agile operation and concurrent multi-band / multi-beam operation, Semtech says. The cores also offer extremely high dynamic performance suited for highly oversampled systems using large instantaneous bandwidth at low power and small areas, the company adds.

The 32-nm data converter cores are the first offering in Semtech’s roadmap. The Semtech roadmap includes a family of data converter cores in 14-nm FinFET expected to be available end of 2015.

“Through leveraging the IBM 32-nm SOI process with its unique feature set, we are developing advanced cores that we believe are well-suited for meeting the challenges presented by the next step in high performance communications systems such as 400-Gbps optical transmission systems and advanced radar systems,” said Craig Hornbuckle, Semtech’s chief systems architect. “We are also seeing an expanding range of applications in the existing radio frequency communications marketplace where high-speed digital logic is replacing functions that have been traditionally performed by less flexible analog circuitry."

The ADC cores have an area of 4 mm2 and the DAC cores have an area of 2.2 mm2. The cores include a wide tuning millimeter-wave synthesizer that enables the core to tune from 42 to 68 GS/s per channel with a nominal jitter value of 45 femtoseconds root mean square, Semtech says.

The full dual-channel 2x64-GS/s ADC core generates 128 billion analog-to-digital conversions per second, with a total power consumption of 2.1 W; the dual DAC consumes 1.7 W. The cores achieve 5.8 ENOB value of up to 10 GHz and spurious-free dynamic range greater than 43 dB, according to Semtech. In addition, the cores contain all necessary built-in self-test and calibration, eliminating the need for the user to develop sophisticated production test or mission mode calibration algorithms, the company says.

The cores are available to be licensed and used as IP cores. Pricing and availability are available on request.

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