Anritsu intros options for 12.5G BERTS to meet SAN and 10-GbE market requirements
September 9, 2004 Richardson, TX -- Anritsu now offers what it claims is the only 12.5G Bit Error Rate Test Set with the differential inputs, ¼ speed differential outputs, and CDR (Clock/Data Recovery) required for evaluating 4.25-Gbit/sec Fibre Channel as well as 10-GbE XAUI and SFI-4P2 devices.
September 9, 2004 Richardson, TX -- Anritsu Co. today introduced three options for MP1763C and MP1764C/D 12.5G Bit Error Rate Test Set (BERTS) that accurately evaluate new high-speed devices used in storage area network (SAN) and 10-Gigabit Ethernet applications (10-GbE). With these options, Anritsu now offers what it claims is the only 12.5G BERTS with the differential inputs, ¼ speed differential outputs, and CDR (Clock/Data Recovery) required for evaluating 4.25-Gbit/sec Fibre Channel as well as 10-GbE XAUI and SFI-4P2 devices.
The new ¼ speed differential option enables differential output of both data and clock at a rate ¼ that of the standard 50-Mbit/sec to 12.5-Gbit/sec output. This allows the 12.5G BERTS to analyze new high-speed devices used in 10-GbE applications, high-speed buses, and backplanes such as PCI Express, much less expensively than using a parallel BERTS, say Anritsu representatives. With its new CDR option, the 12.5G BERTS can use input data as a trigger signal for error rate detection and waveform monitoring. An external clock or CDR is not required, and when the CDR option is used jointly with the new differential input option, high-speed differential devices can be evaluated without an external jig. The CDR is variable and supports bit rates from 62.5 Mbits/sec to 11.1 Gbits/sec, including unique support for 4.25-Gbit/sec Fibre Channel.
Recognizing the large installed base of 12.5G BERTS, Anritsu is offering existing customers special pricing for the new options as well as loaner units during the upgrade period. Very significant discounts are also available to customers who trade in 12.5G BERTS from other manufacturers.
The options complement the overall capabilities of the Anritsu 12.5G BERTS, which consists of the MP1763C Pulse Pattern Generator (PPG) and MP1764C/D Error Detector (ED). Covering a wide frequency range of 50 Mbits/sec to 12.5 Gbits/sec, the BERTS support STM-0/STS-1 to 10-GbE, STM-64/STS-192, and OTU-2, in addition to 4.25-Gbit/sec Fibre Channel.
The 12.5G BERTS capabilities allow it to be used from R&D through manufacturing and production to perform accurate evaluations of transmission equipment, high-speed devices, optical modules, and buses and backplanes.
The MP1763C PPG with ¼ differential outputs is $93,100 and the MP1764D ED that includes both differential input and variable CDR options is $127,000.