Phyworks unveils first 10-Gbit/sec CMOS device to integrate dispersion compensation and re-timing

February 10, 2004 Bristol, England--Phyworks Ltd, a fabless semiconductor company developing electronic solutions to overcome signal degradation on optical fibers, announced that it has begun to ship samples of its PHY1060 Electronic Dispersion Compensation (EDC) integrated circuit (IC) to customers for evaluation.

Feb 10th, 2004

February 10, 2004 Bristol, England--Phyworks Ltd, a fabless semiconductor company developing electronic solutions to overcome signal degradation on optical fibers, announced that it has begun to ship samples of its PHY1060 Electronic Dispersion Compensation (EDC) integrated circuit (IC) to customers for evaluation.

The market's first 10-Gbit/sec device to integrate EDC with a high sensitivity postamplifier and a clock recovery unit (CRU), this innovation--freeEDC--allows Phyworks to offer EDC at no additional cost over existing receiver solutions. Phyworks' EDC enables extended serial 10-Gbit/sec transmission over multimode fiber (MMF infrastructure, including the upgrade from 1 Gbit/sec of the installed base of FDDI-grade legacy fiber currently installed in most LAN networks.

The EDC IC, currently being sampled to select customers, enables a true 'plug and play' solution without demanding additional module space, power and cost, or requiring additional system performance. Phyworks' unique technology is helping to drive the reduction in cost of optical modules by as much as a factor of 10 from only a few years ago, thus establishing a competitive price point with lower data rates. In addition, this single-solution IC also enables the choice of reach extension or the use of lower cost optics in singlemode fiber (SMF) applications.

Designed in standard 0.13-m CMOS technology and packaged in a 5x5mm PBGA, the chip combines proprietary freeEDC circuitry and automatic time-adaptive algorithms to correct intersymbol interference (ISI) sources in MMF and SMF, including chromatic, polarization and differential mode dispersion. The device is the power, size and cost-effective EDC solution for small-form-factor optical modules such as XFP, X2 and XENPAK, and enables enterprise customers to upgrade existing 1-Gbit/sec links to 10 Gbits/sec.

"This chip is the culmination of collaboration with the leading manufacturers of 10-Gbit/sec optical modules and systems," said Stephen King, Phyworks' chief executive officer. "Competitors have made significant compromises in their designs such as not incorporating a CRU. This leads to an EDC IC that will open an eye vertically, but will most likely result in horizontal eye closure, or jitter. This results from the inherent properties of MMF and is addressed by Phyworks' integrated approach to EDC and re-timing. EDC without integrated re-timing burdens components further
downstream in the system.

"We're delighted with the response we've had from customers and collaborators alike with our new EDC IC. 2004 is shaping up to be a great year for the company - we already have firm bookings for almost US$2 million worth of our products."

With the launch of the PHY1060, an aggressive on-going program of research and development, and through active participation within the IEEE 802.3 and
T11 standards committees, Phyworks is actively demonstrating that it is at the forefront of optical component innovation.

To ensure that its EDC solutions are highly robust, Phyworks has been working closely with the Centre of Photonic Systems at Cambridge University to understand the challenges of MMF modelling at 10 Gbits/sec. The Centre, headed by Professor Ian White, is involved in optical communications research, and was pivotal in the MMF modelling work undertaken for the Gigabit Ethernet standard. This model has recently been extended to 10 Gbits/sec by the Centre and results from it will be released publicly shortly.

Commenting on Phyworks' EDC solutions, Professor White said: "The 10-Gbit/sec MMF environment is extremely challenging in terms of modal dispersion and power budget, and hence EDC IC's should be simulated with rigorous models to ascertain yield performance. EDC IC solutions must demonstrate that they can meet this challenge reliably and in a power-efficient manner."

The PHY1060 IC is being sampled by select partners, and will be priced below $50 in volume quantities. The company will demonstrate the chip at the Optical Fiber Communication Conference and Exposition in Los Angeles, February 24-26, booth 4504.


More in Electronics