Fiber-optic transceivers
Four new 3.3V single-chip transceivers with integrated clock and data recovery (cdr) support 622-Mbit/sec Sonet OC-12 and sdh stm4 digital data transmission standards. Three transceivers with integrated cdr are compatible with industry-standard 3.3 and 5.0V 1 ¥ 9 and dual-inline optical modules. The Model S3019 is suited for the telecommunications market, with parity on both buses. The Model S3035, for data and telecom atm backbone applications, features parity on both buses and features a 51-Hz output clock, plus redundant inputs and outputs. The Model S3033 transceiver does not have cdr. This model is available in a 10-mm, 64-pin pqfp for use with 2 ¥ 9 optical modules. All the devices uses phase-locked-loop technology. The low-jitter pecl interface guarantees compliance with the bit-error-rate requirements of Bellcore, ansi, and itu-t standards. Power consumption ranges from 0.8 to 1.2W for each transceiver.
Applied Micro Circuits Corp.
San Diego, CA