SiRES Labs releases single-chip optical transceiver

April 30, 2004 Cyberjaya, Malaysia -- SiRES Labs has released a single-chip integrated optical transmitter (Tx) and receiver (Rx), the first of its kind in the networking and communications industry. The chip, which functions at 3.125 Gbits/sec per channel, is targeted at very short reach (VSR) applications.

Apr 30th, 2004

April 30, 2004 Cyberjaya, Malaysia -- SiRES Labs has released a single-chip integrated optical transmitter (Tx) and receiver (Rx), the first of its kind in the networking and communications industry. The chip, which functions at 3.125 Gbits/sec per channel, is targeted at very short reach (VSR) applications.

The optical transceiver chip integrates the transimpedance amplifier (TIA), limiting amplifier (LA), VCSEL driver, and LVDS interface typically available as individual components. The SRL3101NS features both digital and analog control and monitoring functions and comes in a die measuring 1.6x2.2 mm.

Optimized for speeds ranging from 1 to 3.125 Gbits/sec and consuming 250 mW of power under maximum operating conditions for both transmitter and receiver functions, the SRL3101NS is designed for use with VCSELs and PIN/APDs in VSR applications such as Gigabit Ethernet, SONET VSR links, intra-system, backplanes, SAN, Fibre Channel, and terabit routers and switches.

The chip's main features include a single +3.3-V operation, peak-to-peak jitter of 20 psec (PRBS23); modulation and bias currents of up to 10mA, each controllable via an external analog voltage or digitally through the internal registers via a standard I2C interface; integrated temperature sensor; internal closed-loop feedback for temperature compensation without the need for an external monitor photodiode; adjustable VCSEL diode monitor comparator window; tolerance of photodiode input capacitances of up to 1 pF; input current range from 15 to 400 microamps; a two-step threshold-selectable low-input signal detect feature; and an average input current monitor output. The digital status signals are accessible via internal registers or through the serial digital interface.

The SRL3101NS is available packaged or as bare die with large bond pad pitches. Using the CMOS process, the chip has been designed using the company's dynamic self adaptive biasing (dSAB) technology that compensates for process- and temperature-induced parametric variations and allows for a higher yield of analog circuits in CMOS.

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