MultiLane upgrades BERT user interface with ThunderBERT

June 4, 2020
The GUI will appear first on the test systems vendor’s ML4039E four-channel 56-GBaud PAM4 BERT before being added to the rest of MultiLane’s 100G to 800G BERT portfolio.
Photo: MultiLane Inc.
The ThunderBERT graphical user interface makes using BERTs easier while unlocking more detailed tests.
The ThunderBERT graphical user interface makes using BERTs easier while unlocking more detailed tests.

MultiLane Inc. has developed a new BERT graphical user interface (GUI) that it says is more intuitive and faster to use. Called ThunderBERT, the GUI will appear first on the test systems vendor’s ML4039E four-channel 56-GBaud PAM4 BERT before being added to the rest of MultiLane’s 100G to 800G BERT portfolio.

ThunderBERT is designed to enable users to easily handle Tx and Rx controls and support a range of measurements such as BER, SER, and advanced receiver analysis. Users can easily create graphs that display multiple measurements, enabling a quick visual representation of the DUT’s performance.

Additional benefits of the ThunderBERT GUI include:

  • Real-time addition or removal of measurements
  • Simultaneous display of instant and accumulated analysis
  • Set up and perform multiple BER measurements in parallel
  • Multi-graph capability
  • Enhanced channel loss emulation, including a visual representation of the taps
  • Enhanced enablement of comprehensive error injection.

MultiLane plans to make a version available that unlocks real hardware FEC measurements as well. Using the ThunderBERT and the instrument’s capabilities, users can access the underlying data of the chipset and receive greater insights than possible when relying on only pre- and post FEC BER/SER, says the company. For example, ThunderBERT will enable measurement of corrected and uncorrected codeword count, or uncorrected codeword rate (frame loss rate). Such hardware FEC analysis features exact correlation to what DSP chipsets encounter and therefore provides more accurate system performance metrics, says the company. Without such accuracy, developers and installers in the hyperscale community will have inaccurate figures-of-merit for system optimization, MultiLane points out.

“The combination of advanced analysis capabilities, such as real hardware FEC, and an unprecedented ease-of-use graphical user interface, will aide in the acceleration and adoption of new and challenging interconnect technologies,” said Kees Propstra, senior director of product marketing at MultiLane.

For related articles, visit the Test and Measurement Topic Center.

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