Micrel announces 2.5-Gbit/sec GPON ONU transceiver

June 6, 2007
JUNE 6, 2007 -- The SY87725L is a single-chip programmable SERDES that supports multiple PON standards and rates, including asymmetric GPON with data rates up to 2.5 Gbits/sec on the receive side and 1.25 Gbits/sec on the transmit side, say Micrel representatives.

JUNE 6, 2007 -- Micrel Inc., (search for Micrel), provider of analog, high-bandwidth communications and Ethernet ICs, today launched the SY87725L, a single-chip programmable serializer/deserializer (SERDES) that supports multiple passive optical network (PON) standards and rates, including asymmetric Gigabit PON (search for GPON) with data rates up to 2.5 Gbits/sec on the receive side and 1.25 Gbits/sec on the transmit side.

According to Micrel, the SY87725L offers complete clock recovery and data retiming circuitry, along with an integrated four-bit serial-to-parallel data converter on the receive side. On the transmit side, it also includes a synthesizer with an integrated four-bit parallel-to-serial data converter. The device is targeted at BPON/GPON/GEPON/EPON applications in the growing fiber-to-the-home/premises (FTTH/P) markets.

"The SY87725L SERDES manages all the high-frequency signals in an ONU [optical network unit] and is an ideal low-cost solution for a programmable or upgradeable ONU when pairing with a low cost FPGA," contends Thomas S. Wong, vice president of high- bandwidth products for Micrel. "With the flexibility of the transceiver and the low cost of an FPGA, our customers can provide ONU solutions only limited by their imaginations," he says.

The SY87725L has a four-bit interface, and a double data rate option is included to reduce the clock frequency. This allows the use of the lowest cost FPGA without a significant increase in I/O pins, says the company. The device also features an auto-align circuit that further simplifies the critical timing requirement. The part operates on a single 3.3-V supply with 1 W typical power consumption. The parallel four-bit input/output interfaces feature LVDS I/O.

The SY87725L is available in lead-free (10 mm x 10 mm) 64-pin and EPAD-TQFP package options, says the company. It is currently available in volume and is priced at $9.95 in 1,000-unit quantities. An evaluation board also is available.


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The SY87725L offers complete clock recovery and data retiming circuitry, along with an integrated four-bit serial-to-parallel data converter on the receive side.

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