APRIL 25, 2007 -- Xelic Inc. (search for Xelic), provider of networking intellectual property for FPGA and ASIC applications, today announced the immediate availability of its new 10-Gigabit Ethernet (10-GbE) rate adaptation core (XCE10GA).
The XCE10GA performs rate adaptation through the insertion and removal of complete PCS blocks containing idle characters to provide maximum transparency capability, say company representatives. Optional flow control is provided through the insertion of programmable PAUSE frames in open or closed loop configurations.
10GBASE-R and 10GBASE-W applications are supported with 64B/66B transmission codes transferred at a 10-Gbit rate using a 64-bit data bus operating at 161.13 Mbits/sec. This core is intended as a host side OTN add-on for Ethernet support. The XCE10GA interfaces with the Xelic XCO2 Digital Wrapper framer core to provide a complete 10-Gbit OTN solution.
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