Silicon Laboratories' OC-48 CDR provides performance to Ciena's optical transport product

Sept. 26, 2001
Sept. 26, 2001--Silicon Laboratories Inc. announced that Ciena Corporation has selected its multi-rate clock and data recovery solution for use in Ciena's optical transport system.

Silicon Laboratories Inc. (Nasdaq: SLAB) announced that CIENA Corporation (NASDAQ: CIEN), a global provider of intelligent optical networking systems and software, has selected the Si5020 multi-rate clock and data recovery (CDR) solution for use in its MultiWave CoreStream OC-48 optical transport system. Silicon Labs' CDRs are based on the company's patented DSPLL technology and provide jitter performance, which was key to CIENA's selection of the product. Additionally, the 4x4 millimeter, single-chip Si5020 is five-times smaller than alternative solutions and has a low power consumption.

The Si5020 is based on Silicon Labs' proprietary DSPLL architecture, which utilizes digital signal processing to produce exceptional jitter performance. By keeping all phase locked loop (PLL) circuitry internal, sensitive noise entry points are also eliminated. This makes the Si5020 less susceptible to board-level interaction, helping to ensure optimal jitter performance over a wide range of board designs. Silicon Labs provides a full family of physical layer and system clocking solutions based on the patented DSPLL technology.

About CIENA:

CIENA Corporation's optical networking systems form the core for the new era of networks and services worldwide. For more information, visit

About Silicon Laboratories:

Silicon Laboratories Inc. designs, manufactures and markets proprietary high-performance mixed-signal integrated circuits (ICs) for the wireless, wireline and optical communications industries. For more information, visit

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