TPACK intros packet mapper engine

SEPTEMBER 25, 2007 -- At the Carrier Ethernet World Congress, held this week in Geneva, TPACK (search for TPACK) announced the availability of its TPWX3192 Carrier Packet Mapper Engine. Combining the functionality of a 10-Gigabit Ethernet (10-GbE) over next-generation SONET/SDH packet mapper and a carrier-grade packet processor with traffic management, the TPWX3192 is ideal for cost-optimized multi-service provisioning platforms (search for MSPPs) and microMSPPs as well as packet optical applications, say company representatives.

The TPWX3192 is the first TPACK product to take advantage of the high logic density and low power consumption of Altera's new line of Stratix III FPGAs. Based on 65-nm manufacturing processes, the Stratix III FPGAs enable the TPWX3192 to accommodate the feature sets of both the TPACK TPX3100 20-Gbit/sec Carrier Packet Engine and the TPACK TPW192-S 10 �Gbit/sec next-generation SONET/SDH Packet Mapper. As a result, TPACK says it can support the full range of MEF-defined Carrier Ethernet Services in a single, compact device.

"By combining two products in one, the TPWX3192 provides a lower cost solution, occupying less space and consuming 50% less power without sacrificing features or flexibility," contends TPACK CEO Peter Viereck. "With the 10x increase in bandwidth required by triple-play and IPTV services, the TPWX3192 allows affordable 10-Gbit/sec NG SONET/SDH aggregation solutions to be deployed that can extend the capacity of existing networks."

"TPACK is taking advantage of the best-in-class performance and low power consumption of the Stratix III FPGA in the TPWX3192 to deliver a highly-integrated, complex Ethernet solution," adds David Greenfield, senior director of product marketing for high-end FPGAs at Altera Corp. (search for Altera).

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