Intel Labs touts eight-wavelength laser array on silicon wafer

June 30, 2022

The laser displays output power uniformity of +/- 0.25 dB and wavelength spacing uniformity of ±6.5%, both of which exceed industry specifications, the company says.

Stephen Hardy

The illustration shows Intel Labs' eight-channel hybrid III-V/silicon distributed feedback laser array.

Intel Labs says it has developed and demonstrated an eight-wavelength distributed feedback (DFB) laser array fully integrated on a silicon wafer. The laser displays output power uniformity of +/- 0.25 dB and wavelength spacing uniformity of ±6.5%, both of which exceed industry specifications, the company says.

The laser array is built on Intel’s 300-mm silicon photonics manufacturing process. The company believes the laser array can be used in a variety of applications, including co-packaged optics and optical compute interconnect.

Intel says it leveraged “advanced lithography” to define the waveguide gratings in silicon prior to the III-V wafer bonding process. This approach enabled better wavelength uniformity versus conventional semiconductor lasers manufactured in 3-inch or 4-inch III-V wafer fabs, the company asserts. The tight integration of the lasers also enabled the array to maintain its channel spacing in the face of changes in ambient temperature.

Intel also released an illustration of eight micro-ring modulators and optical waveguide that support multi-wavelength transmission.

“This new research demonstrates that it’s possible to achieve well-matched output power with uniform and densely spaced wavelengths. Most importantly, this can be done using existing manufacturing and process controls in Intel’s fabs, thereby ensuring a clear path to volume production of the next-generation co-packaged optics and optical compute interconnect at scale,” commented Haisheng Rong, senior principal engineer at Intel Labs.

Intel adds that its Silicon Photonics Products Division will use “many aspects” of the integrated laser array technology for a future optical compute interconnect chiplet product. The chiplet will be designed to enable power-efficient, high-performance multi-Tbps interconnect between compute resources including CPUs, GPUs, and memory.

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About the Author

Stephen Hardy | Editorial Director and Associate Publisher, Lightwave

Stephen Hardy is editorial director and associate publisher of Lightwave and Broadband Technology Report, part of the Lighting & Technology Group at Endeavor Business Media. Stephen is responsible for establishing and executing editorial strategy across the both brands’ websites, email newsletters, events, and other information products. He has covered the fiber-optics space for more than 20 years, and communications and technology for more than 35 years. During his tenure, Lightwave has received awards from Folio: and the American Society of Business Press Editors (ASBPE) for editorial excellence. Prior to joining Lightwave in 1997, Stephen worked for Telecommunications magazine and the Journal of Electronic Defense.

Stephen has moderated panels at numerous events, including the Optica Executive Forum, ECOC, and SCTE Cable-Tec Expo. He also is program director for the Lightwave Innovation Reviews and the Diamond Technology Reviews.

He has written numerous articles in all aspects of optical communications and fiber-optic networks, including fiber to the home (FTTH), PON, optical components, DWDM, fiber cables, packet optical transport, optical transceivers, lasers, fiber optic testing, and more.

You can connect with Stephen on LinkedIn as well as Twitter.