Broadcom intros 100GbE multi-rate gearbox PHYs

Broadcom Corp. (NASDAQ: BRCM) has unveiled what it claims are the industry's lowest power and highest performance multi-rate 100 Gigabit Ethernet (GbE) physical layer transceivers (PHYs) for next-generation data center, enterprise, and core network equipment. The company also says that the new Broadcom BCM84790 and BCM84793 gearbox PHYs are the first multi-rate interfaces for 4-lane (4x25-Gbps) and 10-lane (10x10-Gbps) bi-directional transmissions.

Broadcom Corp. (NASDAQ: BRCM) has unveiled what it claims are the industry's lowest power and highest performance multi-rate 100 Gigabit Ethernet (GbE) physical layer transceivers (PHYs) for next-generation data center, enterprise, and core network equipment. The company also says that the new Broadcom BCM84790 and BCM84793 gearbox PHYs are the first multi-rate interfaces for 4-lane (4x25-Gbps) and 10-lane (10x10-Gbps) bi-directional transmissions.

The new chips extend Broadcom's portfolio of 10GbE, 40GbE, and now 100GbE physical layer devices. The company joins a small club of vendors offering 100GbE gearbox PHYs, which also includes Inphi Corp. and Semtech Corp. (see “Inphi sampling CMOS 100-Gigabit Ethernet PHYs” and “Semtech ships 100G CFP Gearbox IC platform”).

The BCM84790 and BCM84793 gearbox PHYs have the ability to multiplex and demultiplex data across four 25-Gbps channels to (or from) ten 10-Gbps channels. Both devices can be configured to support four bi-directional lanes at 10 Gbps for 40GbE repeater applications, support Ethernet and optical transport networking, and are compliant with the IEEE 802.3ba standard for 100GbE and ITU OTL 4.4 signaling.

The BCM84790 features a 17x17-mm BGA package engineered to support CFP network applications; while the BCM84793 comes in a 19x19-mm BGA package with the ability to support 10-lane bi-directional transmissions at 10-Gbps per lane. This added flexibility ensures support for future-generation networking formats such as CFP2 and CXP, Broadcom adds.

Built in low power 40-nm CMOS architecture, the new chips dissipate 2.5 W per port, delivering power savings of more than 35 percent compared to previously available parts, the company asserts.

Key features:

  • Supports Ethernet and optical transport networking (OTN)
  • 100GbE/OTN VSR28 to CAUI interface
  • Less than 200 fs root mean square (rms) of random jitter on the 25-Gbps transmit outputs
  • High-speed eye monitoring diagnostics on all data I/O
  • Integrated clean-up phase lock loop (PLL) reduces bill of material cost
  • Single REFCLK (reference clock) input
  • Low-latency architecture

The BCM84790 and BCM84793 are sampling now. Production release is scheduled for the second half of 2012.

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