Xilinx offers Virtex-5 FPGA for XAUI

MARCH 17, 2008 -- Xilinx, Inc. has announced availability of a Virtex-5 offering for designers using the XAUI communications protocol. The offering includes a reference design, XAUI protocol characterization report for GTP transceivers, access to Xilinx LogiCORE IP, and a PCIe add-in card with CX4 connector development board.

Xilinx believes its new offering will accelerate time to market for architects developing and implementing high-speed designs using the XAUI protocol for applications in the communications, networking, storage, computing, and aerospace and defense markets.

The Virtex-5 FPGAs, with built-in endpoint blocks for PCI Express, Ethernet MAC, and 3.75-Gbit/sec RocketIO GTP transceivers, plus numerous LogiCORE soft IP (including XGMAC and XAUI), are designed to provide a platform that enables implementation of a fully integrated and compliant device that has passed the UNH-IOL testing for the XAUI protocol.

The offering is designed to enable engineers to quickly get a design using XAUI up and running on a desktop PC, including all components needed to bring up a high-performance Virtex-5 FPGA-based XAUI design in a PC environment. The complete offering includes:

• Eight-lane PCI Express add-in card with a CX4 connector
  
• Virtex-5 FPGA
  
• LogiCORE IP products to develop a XAUI, XGMAC, one- to eight-lane PCIe endpoint in the FPGA
  
• Reference Designs and software
  
• Windows and Linux software drivers
  
• Technical documentation.
  

"Our complete XAUI solution enables system architects to rapidly implement XAUI interfaces and evaluate performance benefits in a low-cost desktop PC form factor. Other benefits include reducing design risk and lowering total system cost," said Anil Telikepalli, senior manager of horizontal platform solutions marketing at Xilinx. "The XAUI protocol continues to rapidly expand in new equipment and market segments, and our Virtex-5 LXT and SXT devices, with built-in serial transceivers and LogiCORE IP supporting XAUI protocol and XGMAC layers, are being deployed in an increasing number of existing and new applications."

The Virtex-5 FPGA reference design for XAUI is available for immediate download here.