NetLogic Microsystems introduces low-power 10/40/100GE PHY for next-generation data center Ethernet applications

JULY 12, 2010 -- NetLogic Microsystems Inc., maker of high-performance intelligent semiconductor solutions for next-generation Internet networks, announced its low-power 10/40/100 Gigabit Ethernet PHY for next-generation data center applications.

JULY 12, 2010 -- NetLogic Microsystems Inc., maker of high-performance intelligent semiconductor solutions for next-generation Internet networks, announced its low-power 10/40/100 Gigabit Ethernet PHY for next-generation data center applications.

The new NLP1342 PHY quad-port device integrates receive equalization and transmit pre-emphasis technologies with ultra low latency to address new datacenter opportunities, says a company representative. The device supports 10Gbps SFI-to-XFI, 40Gbps XLPPI-to-XLAUI, and 100Gbps CPPI-to-CAUI modes to enable migration of data centers from 10 Gigabit to 100 Gigabit throughputs.

The exponential demand for video, IPTV, social networking, peer-to-peer, and virtualization services over the Internet has caused network bottlenecks in data centers that are serving media-rich content and services, driving the migration of servers and networking equipment in the data center from 10 Gigabit links to 40 and 100 Gigabit to support next-generation services.

Minimizing the latency in transmitting network traffic has become an important performance metric in the data center, as it can have a profound impact on the overall application performance. It is particularly important because data centers are responsible for managing mission critical and time sensitive transactions, such as financial trades, web-based services, and video content delivery. Unlike enterprise or telco infrastructure networks that transmit packets over longer distances, data center devices are usually only a few meters apart so every micro-second reduction in latency has a very large impact on the overall application performance.

The ability to drive 10/40/100 Gbps transmission over either twin-ax copper or optical cable makes NetLogic Microsystems' NLP1342 PHY well suited for next-generation data centers because of the lower latency the device offers, according to the company. The NLP1342 device integrates an enhanced equalizer front end that enables lower jitter, lower latency, and communications over extended cable distances. Optical fiber and twin-ax copper offer lower latency when compared to traditional Cat-5/Cat-6/Cat-7 copper cabling.

In addition to lowering latency, minimizing power consumption is also critical for successful data center deployments given the large amount of high-performance equipment concentrated in a small area. As datacenters move to 10 Gbps and faster speeds, more power is required to transmit at higher speeds. NetLogic Microsystems' NLP1342 PHY device delivers an ultra-low power profile of 0.5 watt/channel, enabling energy-efficient data centers.

"NetLogic Microsystems' NLP1342 PHY is the first device for the data center to support 10/40/100 Gigabit Ethernet transmission over twin-ax copper, as well as LR and SR optical cabling," says Jag Bolaria, senior analyst at The Linley Group. "Twin-ax copper is popular in the data centers owing to its lower latency and lower power consumption than the current 10GBASE-T copper alternative."

Direct-attach, twin-ax copper cabling offers a cost-effective medium for 10/40/100 Gbps communications over distances of 10 meters. It makes the NLP1342 device well suited for communications from top-of-rack (TOR) switches to rackmount and blade servers. Because the enhanced equalizer front end also supports SR/LR optical cabling, the NLP1342 PHY enables server to end-of-rack (EOR) switch and TOR to EOR switch communications.

The NLP1342 PHY device exceeds the electrical parameters of the nPPI interface as defined in P8023.ba Annex 86A and is compliant with the CR4/CR10 PMDs as defined in P802.3ba Clause 85. The device also offers integration with dedicated pins for SFP+ management and control, dedicated general-purpose I/Os, clock synthesizers, and flexible and programmable Ethernet frame generators and checkers, BER calculators, and link margining tools--all in a low pin-count package ideally suited for SFP+/QSFP+ designs.

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