Intel is offering demonstrations of its 12.8-Tbps programmable Tofino 2 Ethernet switch (gained via the Barefoot Networks acquisition) co-packaged with 1.6-Tbps silicon photonics engines. The demonstrations, originally scheduled for OFC 2020, are taking place this week at an Intel facility.
The demonstration, which Intel Director, Strategic Marketing and Business Development Robert Blum called “a path to a product,” leverages a silicon photonic engine with such features as an on-chip laser, detectors, and resonate ring modulator. It accepts 16 electrical I/Os on the host side and supports a total of 16 PAM4-based parallel optical lanes traveling on parallel single-mode fibers, on the panel side. The 16 optical channels are configured as four ports of 400GBase-DR4 interfaces. The switch/optics combination does not require changes to the switch I/O, added Blum and Prem Jonnalagadda, senior director, product management and marketing at the Barefoot Networks Division of Intel. However, the Tofino 2 optimized for co-packaged optics ships in a multi-die package that makes it easier to upgrade the SerDes for lower power or higher throughput, said Intel via a press release.
While Intel plans to offer complete switch/co-packaged optics products, the co-packaged optics approach is applicable to switches designed by companies other than Intel, said Blum and Jonnalagadda, as long as the switch chip has the necessary onboard short-reach SerDes I/O capabilities. The company is in the process of contacting potential partners to ensure applicability to such initiatives as that Facebook and Microsoft have launched (see “Microsoft, Facebook form Co-Packaged Optics Collaboration”).
The demonstration sees the switch/optics co-packaging implemented in an air-cooled 2RU Ethernet switch. The optical technology that composes the demonstration is capable of scaling to 3.2 Tbps or more, says Blum. He predicted that co-packaged approaches will begin to ramp significantly once switches reach 51.2 Tbps with 100-Gbps I/O.
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